參數(shù)資料
型號(hào)： T8102A
英文描述： H.100/H.110 Interface and Time-Slot Interchangers
中文描述： H.100/H.110接口和時(shí)隙Interchangers
文件頁(yè)數(shù)： 3/112頁(yè)
文件大?。?/td> 1408K
代理商： T8102A
Advisory
November 1999, Rev. 4
Exceptions and Clarifications for Ambassador
TM
T8100A, T8102,
and T8105 H.100/H.110 Interface and Time-Slot Interchangers
Device Exceptions
Users of the AmbassadorT8100A, T8102, and
T8105 devices should be aware of the following
device operation exceptions and the associated solu-
tions:
1. When a compatibility clock is programmed as a
slave, and the board generates A or B clocks, the
watchdog will indicate an error on the A or B
clocks it generates. The error will be reported
even though the generated clocks are good.
Workaround
: Use the master board to accurately
monitor the clocks.
2. When a compatibility clock is programmed as a
slave, and the clock selector is set to A or B
clocks with slide phase alignment, the slave board
does not lock and the generated frame continues
sliding.
Workaround
: None.
Product Status
: Device redesign required.
3. Models of the AmbassadorT8100A, T8102, and
T8105 devices exhibit intermittent corrupted time-
slot data. H.100 stream 0 time slot 1 (for outgoing
data) and H.100 stream 1 time slot 127 (for
incoming data at 8.192 MHz, time slot 63 for
4.096 MHz, and time slot 31 for 2.048 MHz) are
the most likely stream/time slots to be corrupted.
However, intermittent time-slot corruption may
occur in other stream/time slots.
The time-slot corruption problem occurs when a
T810x device is used in slave-timing mode, as
described in Section 2.5 of the Data Sheet. In a
typical slave timing application, a T810x device is
set to phase align to an incoming bitclock/frame
reference pair (i.e., slave to CT_C8_A/FRAME_A,
CT_C8_B/FRAME_B, C4/FR_COMP etc.). Both
SNAP and SLIDE alignment modes are affected.
Devices that don't require phase alignment to
these clocks (i.e., the primary bus master) should
not exhibit stream data corruption.
Root Cause
: The analog PLL has an error which
introduces an unexpected 6 ns—7 ns of skew.
This skew causes the phase alignment circuit to
fail intermittently, whether in the SNAP or SLIDE
mode. An intermittent SLIDE produces an internal
frame signal that does not align and phase lock
with an incoming frame reference. An intermittent
SNAP forces a reset of the internal counters and
results in corrupted stream data.
Workaround
: There is no workaround. The solu-
tion is a fix to the silicon. Samples are scheduled
for release in August 1999.
4. Version 2 models of the AmbassadorT8100A,
T8102, and T8105 devices can exhibit intermittent
corrupted time slot data in one specific configura-
tion. The problem occurs when a master T810x
device is given an 8 kHz signal as the timing
reference and multiplies it up to 2.048 MHz or
4.096 MHz in the digital PLL (DPLL). The DPLL
introduces sufficient jitter on the A or B master
output clocks that slave devices falsely interpret
as a loss of sync and either snap or slide align to
this false sync indication. This, in turn, causes
corruption of time slot data. Any master timing ref-
erence that does not make use of the DPLL does
not exhibit the problem.
Workaround
: Do not use an 8 kHz signal as the A
or B master timing reference, since this requires
use of the DPLL. Instead, supply a jitter-free tim-
ing reference at any of the other allowable fre-
quencies (2.048, 4.096, 8.192 or 16.384 MHz).
Product Status
: The solution is a fix to the
silicon.
相關(guān)PDF資料
PDF描述
T8105A H.100/H.110 Interface and Time-Slot Interchangers
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
T810-400B 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HIGH PERFORMANCE TRIACS
T8105A 制造商:AGERE 制造商全稱:AGERE 功能描述:H.100/H.110 Interface and Time-Slot Interchangers
T810-600B 功能描述:雙向可控硅 8A TRIACS RoHS:否 制造商:STMicroelectronics 開啟狀態(tài) RMS 電流 (It RMS):16 A 不重復(fù)通態(tài)電流:120 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài)電壓: 保持電流（Ih 最大值）:45 mA 柵觸發(fā)電壓 (Vgt):1.3 V 柵觸發(fā)電流 (Igt):1.75 mA 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220AB
T810-600B 制造商:STMicroelectronics 功能描述:TRIAC 8A 600V D-PAK
T810-600B-TR 功能描述:雙向可控硅 8A TRIACS RoHS:否 制造商:STMicroelectronics 開啟狀態(tài) RMS 電流 (It RMS):16 A 不重復(fù)通態(tài)電流:120 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài)電壓: 保持電流（Ih 最大值）:45 mA 柵觸發(fā)電壓 (Vgt):1.3 V 柵觸發(fā)電流 (Igt):1.75 mA 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220AB
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