參數(shù)資料
型號(hào): T8102A
英文描述: H.100/H.110 Interface and Time-Slot Interchangers
中文描述: H.100/H.110接口和時(shí)隙Interchangers
文件頁(yè)數(shù): 76/112頁(yè)
文件大?。?/td> 1408K
代理商: T8102A
72
Lucent Technologies Inc.
Advance Data Sheet
November 1999
H.100/H.110 Interfaces and Time-Slot Interchangers
Ambassador T8100A, T8102, and T8105
3 Using the TSI Devices
(continued)
3.3 Basic Connections
(continued)
3.3.4 Physical Connections for H.100
All H.100 bus signals must adhere to the specification,
ECTF H.100 Hardware Compatibility Specification: CT
Bus The H.100 clock signals, CT_C8_A, CT_C8_B,
/CT_FRAME_A, /CT_FRAME_B, and CT_NETREF,
each require an individual external pull-up of 100 k
to
5 V or 50 k
to 3.3 V.
If CT_NETREF, CT_8A, CT_8B, CT_FRAME_A, or
CT_FRAME_B are not going to be used, they must be
tied to ground, V
CC
or a pull-up resistor. They cannot be
left floating, since they could oscillate.
3.3.5 Physical Connections for H.110
Figure 21 shows the physical connections required for
use in an H.110 environment. There are electrical dif-
ferences between H.100 and H.110. For H.110, exter-
nal components are required to meet specifications.
The specification is ECTF H.110 Hardware Compatibil-
ity Specification: CT Bus Figure 21 shows the
NETREF terminations and the required terminations for
CT_C8A, CT_FRAMEA, CT_C8B, and CT_FRAMEB.
Each signal has a mechanism to short the 33
series
resistor and, in addition, a 10 k
pull-down resistor.
The 50 k
internal pull-ups on the CT data bus are
used for H.100. For H.110, the DPUE pin should be
tied low, disabling these internal pull-ups. H.110
requires the CT data bus to have pull-ups of 18 k
to
0.7 V. The control leads of the FET switches would typ-
ically go to the microprocessor.
3.3.6 PC Board BGA Considerations
There are no special requirements for the thermal balls
on the BGA package when designing a printed-circuit
board.
5-7142cF
* Switched low for insertion/removal.
Figure 21. Physical Connections for H.110
CT_NETREF2
CT_FRAMEA
CT_FRAMEB
CT_C8B
CT_NETREF2
CT_NETREF1
SCLKX2
CTD[0:31]
CT_C8B
SCLK
CT_FRAMEB
CT_FRAMEA
SCLK
33
CT_C8A
10 k
CTC8A_SRC
33
10 k
CTC8A_SRC
33
10 k
CTC8B_SRC
33
10 k
CTC8B_SRC
0
DEPOPULATE
CT_C8A
SCLKX2
0
DEPOPULATE
CTD[0:31]
24
DPUE
0.7 V
18 k
32
18 k
0.7 V
24
24
LUCENT
T8100A
T8102
T8105
18 k
0.7 V
CT_NETREF1
LPUE*
POWER
MANAGER
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