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| 型號： | T8102A |
| 英文描述： | H.100/H.110 Interface and Time-Slot Interchangers |
| 中文描述： | H.100/H.110接口和時隙Interchangers |
| 文件頁數(shù)： | 57/112頁 |
| 文件大?。?/td> | 1408K |
| 代理商： | T8102A |
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Lucent Technologies Inc.
53
Advance Data Sheet
November 1999
H.100/H.110 Interfaces and Time-Slot Interchangers
Ambassador T8100A, T8102, and T8105
2 Architecture and Functional Description
(continued)
2.5 Clocking Section
(continued)
2.5.8 Clock Control Register Definitions
(continued)
Table 50. CKS: Clocks, Secondary (Fallback) Selection, 0x04
Clock register 0x04 is CKS, the secondary clock selection register. This is also referred to as fallback. When pro-
gramming the clock registers, writing to CKW and CKS should be programmed last. The register is defined as fol-
lows.
Reg
CKS
R/W
—
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
FF
Bit 2
Bit 1
FCSEL
Bit 0
FRS
FTS
Symbol
FRS
Bit
7—6 FRS provides an alternate clock resource selection. FRS forces the clock resource selector to
choose a new source for PLL #1.
FRS = 00,
External input (through the 4MHzIN pin).
FRS = 01,
Resource divider.
FRS = 10,
DPLL @ 2.048 MHz.
FRS = 11,
DPLL @ 4.096 MHz.
Note:
The decode is the same as that of the CRS bits (in the clock resource register, CKR).
5—4 FTS determines the basic fallback mode (see Section 2.5.8.1 Basic Fallback Mode).
FTS = 00,
This is automatic fallback to the oscillator divided by 4,
thus 4.096 MHz.
FTS = 01,
This disables fallback.
FTS = 10,
This is one of the two major fallback selections.
FTS = 11,
This fallback selection specifically supports standard H.100 and
H.110 applications.
3
FF forces the use of the FRS, FTS, and FCSEL. FF is used as a test of the fallback, but can
also be used as a software-initiated fallback.
FF = 0,
Normal operation.
FF = 1,
Force use of secondary (fallback) resources.
2—0 FCSEL is used to select an alternate synchronization source. The FCSEL choices are a subset
of the CKSEL values from the CKM register above. The list is presented below:
FCSEL = 000,
Internal oscillator divided by 4.
FCSEL = 001,
NETREF2.
FCSEL = 010,
A clocks (C8A & FRAMEA); ECTF or MC-1.
FCSEL = 011,
B clocks (C8B & FRAMEB); ECTF or MC-1.
FCSEL = 100,
NETREF1.
FCSEL = 101—111,
Selects local references 1—3.
Description
FTS
FF
FCSEL
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| T810-400B | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HIGH PERFORMANCE TRIACS |
| T8105A | 制造商:AGERE 制造商全稱:AGERE 功能描述:H.100/H.110 Interface and Time-Slot Interchangers |
| T810-600B | 功能描述:雙向可控硅 8A TRIACS RoHS:否 制造商:STMicroelectronics 開啟狀態(tài) RMS 電流 (It RMS):16 A 不重復通態(tài)電流:120 A 額定重復關閉狀態(tài)電壓 VDRM:600 V 關閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài)電壓: 保持電流（Ih 最大值）:45 mA 柵觸發(fā)電壓 (Vgt):1.3 V 柵觸發(fā)電流 (Igt):1.75 mA 最大工作溫度: 安裝風格:Through Hole 封裝 / 箱體:TO-220AB |
| T810-600B | 制造商:STMicroelectronics 功能描述:TRIAC 8A 600V D-PAK |
| T810-600B-TR | 功能描述:雙向可控硅 8A TRIACS RoHS:否 制造商:STMicroelectronics 開啟狀態(tài) RMS 電流 (It RMS):16 A 不重復通態(tài)電流:120 A 額定重復關閉狀態(tài)電壓 VDRM:600 V 關閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài)電壓: 保持電流（Ih 最大值）:45 mA 柵觸發(fā)電壓 (Vgt):1.3 V 柵觸發(fā)電流 (Igt):1.75 mA 最大工作溫度: 安裝風格:Through Hole 封裝 / 箱體:TO-220AB |
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