參數(shù)資料
型號： TMUX03155
英文描述： TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer
中文描述： TMUX03155 STS-3/STM-1（非盟- 4）復(fù)用器/解復(fù)用器
文件頁數(shù)： 47/120頁
文件大?。?/td> 1542K
代理商： TMUX03155
Agere Systems Inc.
47
Data Sheet
April 2001
TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer
Microprocessor Interface
Overview
The device is equipped with an asynchronous microprocessor interface that can operate with most commercially
available microprocessors. Inputs MPMUX and MPMODE are used to configure this interface into one of four pos-
sible modes. The MPMUX setting selects either a multiplexed 8-bit address/data bus (AD[7:0]) or a demultiplexed
8-bit address bus (A[7:0]) and an 8-bit data bus (AD[7:0]). The MPMODE setting selects the associated set of reg-
isters within the device.
Due to device flexibility, there are no default powerup or reset states. All read/write registers must be written by the
microprocessor on system start-up to guarantee proper device functionality. The microprocessor interface can
operate at speeds up to 32.768 MHz in interrupt-driven or polled modes without requiring any wait-states.
Microprocessor Configuration Modes
Table 20 highlights the four microprocessor modes controlled by the MPMUX and MPMODE inputs.
Table 20. Microprocessor Configuration Modes
* When the MPMODE3ALE input pin = 0, ALE is not used to retime the incoming address.
Microprocessor Interface Pinout Descriptions
The MODE [1—4] specific pin definitions are given in Table 21. Note that the microprocessor interface uses the
same set of pins in all modes.
Table 21. MODE [1—4] Microprocessor Pin Definitions
Mode
MPMODE
MPMUX
Address/Data Bus
Generic Control, Data and Output Pin Names
MODE 1
0
0
DeMUXed
CS, AS, DS, R/W, A[7:0], AD[7:0], INT, DTACK
MODE 2
0
1
MUXed
CS, AS, DS, R/W, AD[7:0], INT, DTACK
MODE 3*
1
0
DeMUXed
CS, ALE, RD, WR, A[7:0], AD[7:0], INT, RDY
MODE 4
1
1
MUXed
CS, ALE, RD, WR, AD[7:0], INT, RDY
Configuration
Device Pin
Name
Generic Pin
Name
Pin
Type
Assertion
Sense
Function
MODE 1
WR_DS
DS
Input
Active-Low Data Strobe
RD_R/W
R/W
Input
—
Read/Write
R/W = 1 for Read
R/W = 0 for Write
ALE_AS
AS
Input
—
Address Strobe
CS
CS
Input
Active-Low Chip Select
INT
INT
Output
Active-High Interrupt
RDY_DTACK
DTACK
Output
Active-Low Data Acknowledge
AD[7:0]
AD[7:0]
I/O
—
Data Bus
A[7:0]
A[7:0]
Input
—
Address Bus
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