參數(shù)資料
型號(hào): TMUX03155
英文描述: TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer
中文描述: TMUX03155 STS-3/STM-1(非盟- 4)復(fù)用器/解復(fù)用器
文件頁數(shù): 93/120頁
文件大小: 1542K
代理商: TMUX03155
Agere Systems Inc.
93
Data Sheet
April 2001
TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer
Microprocessor Interface
(continued)
Register Map
(continued)
Table 86. Page 1 - Registers 167—172: Receive High-Speed Path FEBE Count (RO)
Table 87. Page 2 - Register 131 (R/W)
Address
Dec (Hex)
167 (0xA7)—
172 (0xAC)
Bit
Name
Function
Reset
Default
0x0000
7—0
RPFEBECNT[1—3][15:8]
RPFEBECNT[1—3][7:0]
Receive Path FEBE Count.
Counts the number
of B3 errors received in the G1[7:4] bits of the
received STS-3/STM-1 (AU-4) frame. This
counter can either count actual PFEBE errors or
block errors (FEBEBITBLOCKCNT, 0x34). This
counter holds at its maximum value and transfers
its internal count to a holding register when
LATCH_CNT, 0x04 transitions from a logic 0 to 1.
Address
Dec (Hex)
131 (0x83)
Bit
Name
Function
Reset
Default
0
7
SDB1B2SEL
Signal Degrade B1/B2 Error Count Select.
Control bit, when set to a logic 0, causes the sig-
nal degrade bit error rate algorithm to use B1
errors; otherwise, B2 errors are used to calculate
the error rate.
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