E
7.3.10.
82371AB (PIIX4)
153
4/9/97 2:23 PM PIIX4aDS
INTEL CONFIDENTIAL
(until publication date)
PRELIMINARY
SMBSHDWCMD—SMBUS SHADOW COMMAND REGISTER (IO)
I/O Address:
Default Value:
Attribute:
Base + (09h)
00h
Read Only
This register is used to store command values for external SMBus master accesses to the host slave and slave
shadow ports.
Bit
Description
7:0
Shadow Command (SHDW_CMD)—RO.
This field contains the command value which was
received during an external SMBus master access whose address field matched the host slave
address (10h) or one of the slave shadow port addresses.
7.3.11.
SMBSLVEVT—SMBUS SLAVE EVENT REGISTER (IO)
I/O Address:
Default Value:
Attribute:
Base + (0Ah)
0000h
Read/Write
This register is used to enable generation of interrupt or resume events for accesses to the host controller’s
slave port.
Bit
Description
15:0
SMBus Slave Event (SMB_SLV_EVT)—R/W.
This field contains data bits used to compare against
incoming data to the SMBSLVDAT register. When a bit in this register is a 1 and the corresponding
bit in the SMBSLVDAT register is set, then an interrupt or resume event will be generated if the
command value matches the value in the SMBSLVC register and the access was to SMBus host
address 10h.
7.3.12.
SMBSLVDAT—SMBUS SLAVE DATA REGISTER (IO)
I/O Address:
Default Value:
Attribute:
Base + (0Ch)
0000h
Read Only
This register is used to store data values for external SMBus master accesses to the shadow ports or the
SMBus host controller’s slave port.
Bit
Description
15:0
Slave Data (SMB_SLV_DATA)—RO.
This field contains the data value which was transmitted
during an external SMBus master access whose address field matched one of the slave shadow
port addresses or the SMBus host controller slave port address of 10h.