82371AB (PIIX4)
E
278
4/9/97 2:23 PM PIIX4aDS
INTEL CONFIDENTIAL
(until publication date)
PRELIMINARY
14.2.
Tri-state Mode
When in the tri-state test mode, all outputs and bi-directional pins are tri-stated, including the NAND
tree outputs.
14.3.
NAND Tree Mode
PIIX4 has five independent NAND trees. Each one can be enabled by itself or all five can be enabled at once.
When a NAND tree is enabled, all output and bi-directional buffers within that tree are tri-stated, except for the
NAND tree output. All output and bi-directional buffers for pins not in the selected NAND tree are tri-stated.
Every output signal except for each NAND tree’s output buffer is configured as an input and is included in the
NAND chain. Table 60–Table 64 on page 279 list each NAND tree pin ordering, with the first value being the first
input and the last value being the NAND tree output.
Table 65 lists the signal pins not included in any NAND tree.
There are two methods for performing a NAND tree test.
1.
The first is to drive all NAND tree input pins to 0. The output of the NAND tree will be a 1. Starting at the last
signal in the NAND tree (signal at bottom of list next to output), drive a 1 onto each signal, one at a time. The
NAND tree output will toggle on each input signal transitioned from 0 to 1. Allow 500 ns for the input signals
to propagate to the NAND tree outputs (input-to-output propagation delay specification).
The second method works in reverse. Drive all NAND tree input pins to a 1. Then starting at the first signal in
the NAND tree (signal at top of each list), drive a 0 onto each signal, one at a time. The NAND tree output
will toggle on each input signal transitioned from 1 to 0. Allow 500 ns for the input signals to propagate to the
NAND tree outputs (input-to-output propagation delay specification).
2.