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參數(shù)資料
| 型號(hào)： | FW82371 |
| 廠商： | Intel Corp. |
| 英文描述： | PCI-TO-ISA / IDE XCELERATOR PIIX4 |
| 中文描述： | PCI到的ISA / IDE的XCELERATOR PIIX4 |
| 文件頁(yè)數(shù)： | 181/284頁(yè) |
| 文件大?。?/td> | 1042K |
| 代理商： | FW82371 |
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E
The Control Word Register is write only. Counter status information is available with the read back Command.
82371AB (PIIX4)
181
4/9/97 2:23 PM PIIX4aDS
INTEL CONFIDENTIAL
(until publication date)
PRELIMINARY
Because the timer counters wake up in an unknown state after power up, multiple refresh requests may be
queued. To avoid possible multiple refresh cycles after power up, program the timer counter immediately after
power up.
Write Operations
Programming the interval timer is a simple process:
1.
2.
3.
Write a control word.
Write an initial count for each counter.
Load the least and/or most significant bytes (as required by Control Word bits 5, 4) of the 16-bit counter.
The programming procedure for the PIIX4 timer is very flexible. Only two conventions need to be observed. First,
for each counter, the control word must be written before the initial count is written. Second, the initial count must
follow the count format specified in the control word (least significant byte only, most significant byte only, or
least significant byte and then most significant byte).
Since the Control Word Register and the three counters have separate addresses (selected by the A1, A0
inputs), and each control word specifies the counter it applies to (SC0, SC1 bits), no special instruction
sequence is required. Any programming sequence that follows the conventions above is acceptable.
A new initial count may be written to a counter at any time without affecting the counter’s programmed mode.
Counting will be affected as described in the mode definitions. The new count must follow the programmed count
format.
If a counter is programmed to read/write 2-byte counts, the following precaution applies: A program must not
transfer control between writing the first and second byte to another routine which also writes into that same
counter. Otherwise, the counter will be loaded with an incorrect count.
Interval Timer Control Word Format
The control word specifies the counter, the operating mode, the order and size of the count value, and whether it
counts down in a 16-bit or binary-coded decimal (BCD) format. After writing the control word, a new count may
be written at any time. The new value will take effect according to the programmed mode.
If a counter is programmed to read/write 2-byte counts, the following precaution applies: A program must not
transfer control between writing the first and second byte to another routine which also writes into that same
counter. Otherwise, the counter will be loaded with an incorrect count. The count must always be completely
loaded with both bytes.
Read Operations
It is often desirable to read the value of a counter without disturbing the count in progress. There are three
possible methods for reading the counters: a simple read operation, the Counter Latch Command, and the Read
Back Command.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| FW82801E | Intel 82801E Communications I/O Controller Hub (C-ICH) |
| FWB150 | 1.5 AMP FAST RECOVERY BRIDGE RECTIFIERS |
| FWB151 | 1.5 AMP FAST RECOVERY BRIDGE RECTIFIERS |
| FWB1510 | 1.5 AMP FAST RECOVERY BRIDGE RECTIFIERS |
| FWB152 | 1.5 AMP FAST RECOVERY BRIDGE RECTIFIERS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FW82371EB | 制造商:Intel 功能描述:IC INTEL 82371EB 352BGA 制造商:Rochester Electronics LLC 功能描述: |
| FW82371EB S L37M | 制造商:Intel 功能描述:Embedded Processor 352-Pin BGA |
| FW82371EB SL37M | 制造商:Intel 功能描述: |
| FW82371MB | 制造商:Rochester Electronics LLC 功能描述:PCI-ISA BRIDGE, T&R, SPEC SL3CG - Bulk |
| FW82439HX | 制造商:Intel 功能描述: |
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