- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368064 > PM5372-BI Telecommunication IC PDF資料下載
參數(shù)資料
| 型號： | PM5372-BI |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁數(shù)： | 137/169頁 |
| 文件大?。?/td> | 989K |
| 代理商： | PM5372-BI |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁當(dāng)前第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁
TSE Transmission Switch Element Datasheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1991258, Issue 7
137
OCA implies OFA until character alignment is re-achieved. OCA will most likely cause some
LCVs but not necessarily a continual stream of them. Since character boundaries are not known,
framing and disparity are effectively meaningless anyway.
OFA, by itself, does not cause any of the other conditions.
FUO may produce zero, one or many LCVs, depending on how the FIFO overrun/underrun
occurs.
Persistent LCVs (five or more in any sequence of 15 characters) cause OCA.
12.9 Accessing Indirect Registers
Indirect registers are used to conserve address space in the TSE. Writing the indirect address
register accesses indirect registers. The following steps should be followed for writing to indirect
registers:
Read the BUSY bit. If it is equal to logic 0, continue to step 2. Otherwise, continue polling the
BUSY bit.
Write the desired configurations for the channel into the indirect data registers.
Write the channel number (indirect address) to the indirect address register with RWB set to logic
0.
Read BUSY. Once it equals 0, the indirect write has been completed.
The following steps should be followed for reading indirect registers:
Read the BUSY bit. If it is equal to logic 0, continue to step 2. Otherwise, continue polling the
BUSY bit.
Write the channel number (indirect address) to the indirect address register with RWB set to logic
1.
Read the BUSY bit. If it is equal to logic 0, continue to 4. Otherwise, continue polling the BUSY
bit.
Read the indirect data registers to find the state of the register bits for the selected channel
number.
12.10 Using the Performance Monitoring Features
The performance monitor counters within the TSE are the R8FA line code violation counters. The
counters will saturate and not roll over if they reach their maximum value.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PM5380 | PMC-2010299 S/UNI-8x155 Telecom Standard Product Data Sheet [1.91 MB] |
| PM554 | Programmable Quad Supply Monitor with Adjustable Reset and Watchdog Timers; Package: SSOP; No of Pins: 16; Temperature Range: -40°C to +85°C |
| PM555 | 1 to 10 watt encapsulated power modules |
| PM556 | Precision Quad Supply Monitor in 6-Lead SOT-23; Package: SOT; No of Pins: 6; Temperature Range: 0°C to +70°C |
| PM560 | Precision Quad Supply Monitor in 6-Lead SOT-23; Package: SOT; No of Pins: 6; Temperature Range: 0°C to +70°C |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PM5372BIP | 制造商:PMC-Sierra 功能描述: |
| PM5372-BI-P | 制造商:PMC-Sierra 功能描述: |
| PM5376HFI | 制造商:PMC-Sierra 功能描述: |
| PM5377 | 制造商:PMC 制造商全稱:PMC 功能描述:Single Chip 96-Port STS-1/STM-0 Cross-Connect |
| PM537CE | 制造商:ARTESYN 制造商全稱:Artesyn Technologies 功能描述:Single, dual and triple output 1 to 10.5 Watt AC/DC encapsulated modules |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。