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| 型號(hào)： | PM5372-BI |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁(yè)數(shù)： | 54/169頁(yè) |
| 文件大小： | 989K |
| 代理商： | PM5372-BI |
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TSE Transmission Switch Element Datasheet
Released
Microprocessor Interface
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1991258, Issue 7
54
9.10
The Microprocessor Interface Block provides the logic required to interface the normal mode and
test mode registers within the TSE to a generic microprocessor bus. The normal mode registers
are used during normal operation to configure and monitor the TSE. The register set is accessed
as shown in the Register Memory Map table below. Addresses that are not shown are not used
and must be treated as Reserved.
The ports are organized into 16 Port Sets. A Port Register Set is specified for each Port Set.
Registers for Port Register Set 1 are specified in the register memory map. For the remaining Port
Register Sets, only the range of registers is specified. As with Port Register Set 1 not all addresses
within a range correspond to actual registers. To obtain a corresponding register for port set N+1,
take the register address for Port Register Set 1 and replace address bits A[11:8] with N. The
grouping of the Receive and Transmit LVDS ports to a port register set is defined as follows: Port
Register Set N+1 controls blocks associated with receive LVDS links
RP[4N+4:4N+1]/RN[4N+4:4N+1]. This includes RXLV, DRU, and R8FA blocks 4N+4 down to
4N+1, and ITSE block N+1. Port Register Set N+1 controls blocks associated with transmit
LVDS links TP[4N+4:4N+1]/TN[4N+4:4N+1]. This includes ETSE block N+1, T8DE, PISO,
and TXLV blocks 4N+4 down to 4N+1.
Register Memory Map
Address
Register
0000
TSE Master Reset
0001
TSE Master Clock Activity and Accumulation Trigger
0002
TSE Master Configuration
0003
TSE Master Interrupt Block Identifier
0004
TSE Master R8FA Interrupt Source #1
0005
TSE Master R8FA Interrupt Source #2
0006
TSE Master R8FA Interrupt Source #3
0007
TSE Master R8FA Interrupt Source #4
0008
TSE Master T8DE Interrupt Source #1
0009
TSE Master T8DE Interrupt Source #2
000A
TSE Master T8DE Interrupt Source #3
000B
TSE Master T8DE Interrupt Source #4
000C
TSE Master ITSE Interrupt Source
000D
TSE Master ETSI Interrupt Source
000E
TSE Master CSTR Interrupt Source
000F
TSE Master User Defined
0010
TSE Master JTAG ID High
0011
TSE Master JTAG ID Low
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