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TSE Transmission Switch Element Datasheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1991258, Issue 7
48
9.1.5
Parallel to Serial Converter (PISO)
The PISO_1250 is a parallel-to-serial converter designed for high-speed transmit operation,
supporting up to 777.6 Mb/s.
There are 64 instances of the PISO on the TSE.
9.1.6
Clock Synthesis Unit (CSU)
The CSU is a fully integrated clock synthesis unit. It generates low jitter multi-phase differential
clocks at 777.6 MHz for use by the transmitter.
There are 4 instances of the CSU on the TSE.
9.2
Receive 8B/10B Frame Aligner (R8FA)
The R8FA block performs 8B/10B character alignment and SONET STS-12 frame alignment on
an unaligned bit stream received from a DRU block. A total of 64 R8FA blocks are instantiated in
the TSE device.
R8Fas recovers 8B/10B character alignment by searching for the 8B/10B J0 frame alignment
control character, which is used to identify the start of STS-12 flows. In addition, the TSE’s
STS-1 switching mechanism requires that all incoming STS-12s be mutually aligned within a
certain tolerance. The 64 R8Fas in each TSE must present frame aligned 10b samples of aligned
STS-12 flows to the switching stages.
The R8FA contains a FIFO to accommodate jitter, wander, and phase alignment differences
between the timing domain of the receive LVDS links and the system clock timing domain. The
FIFO also enables alignment of the multiple R8Fas in transmitting frames to the switching
blocks.
Table 12 show the 8B/10B characters that the R8FA recognizes. All 8B/10B characters in Table
12 are reserved for TelecomBus control characters. The TSE doesn’t do any processing on the
TelecomBus control characters (with the exception of K28.5). The TSE will accepts incorrect
disparity characters without signaling LCVs for those characters noted in the table.
Table 12 TelecomBus Control Characters
Code
Group
Name
Curr. RD-
abcdei fghj
Curr. RD+
abcdei fghj
Signal Description
Disparity
Violation
Allowed
K28.5
001111 1010
110000 0101
Transport J0 frame alignment
No
K28.0-
001111 0100
-
High-order path H3 byte,
no negative justification event
Yes
K28.0+
-
110000 1011
High-order path PSO byte, positive
Yes