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| 型號(hào)： | PM5372-BI |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁(yè)數(shù)： | 37/169頁(yè) |
| 文件大?。?/td> | 989K |
| 代理商： | PM5372-BI |
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TSE Transmission Switch Element Datasheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1991258, Issue 7
37
Pin Name
Type
Pin No.
Function
register read accesses. The TSE drives the D[15:0] bus with the contents
of the addressed register while RDB and CSB are low.
WRB
Input
F4
Write Enable Bar.
The active low write enable bar signal (WRB) controls
microprocessor write accesses to registers in the TSE device. WRB is set
low and CSB is also set low during TSE Microprocessor Interface Port
register write accesses. The contents of D[15:0] are clocked into the
addressed register on the rising edge of WRB while CSB is low.
D[15]
D[14]
D[13]
D[12]
D[11]
D[10]
D[9]
D[8]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
I/O
AN36
AN39
AP37
AP36
AP38
AR37
AR36
AR38
AT7
AW7
AU6
AT6
AV6
AU5
AT5
AV5
Microprocessor Data Bus.
The bi-directional data bus, D[15:0] is used
during TSE Microprocessor Interface Port register reads and write
accesses. D[15] is the most significant bit of the data words and D[0] is the
least significant bit.
A[12]/TRS
A[11]
A[10]
A[9]
A[8]
A[7]
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
A[0]
Input
A5
B33
A33
D34
B34
A34
C35
B35
A35
E39
E38
E36
E37
Microprocessor Address Bus.
The microprocessor address bus
(A[12:0]) selects specific Microprocessor Interface Port registers during
TSE register accesses.
A[12] is also the Test Register Select (TRS) address pin and selects
between normal and test mode register accesses. TRS is set high during
test mode register accesses, and is set low during normal mode register
accesses.
ALE
Input
F3
Address Latch Enable.
The address latch enable signal (ALE) is active
high and latches the address pins (A[12:0]) when it is set low. The internal
address latches are transparent when ALE is set high. ALE allows the
TSE to interface to a multiplexed address/data bus. ALE has an integral
pull-up resistor.
INTB
Open
Drain
Output
G1
Interrupt Request Bar
. The active low interrupt enable signal (INTB)
output goes low when an TSE interrupt source is active and that source is
unmasked. INTB returns high when the interrupt is acknowledged via an
appropriate register access. INTB is an open drain output.
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