參數(shù)資料
型號: PM5372-BI
英文描述: Telecommunication IC
中文描述: 通信集成電路
文件頁數(shù): 98/169頁
文件大?。?/td> 989K
代理商: PM5372-BI
TSE Transmission Switch Element Datasheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1991258, Issue 7
98
Register 0N82H, 0N8AH, 0N92H, 0N9AH: Port Set #1 - #16 R8FA #1 - #4 Line Code Violation
Count
Bit
Type
Function
Default
Bit 15
R
LCV[15]
X
Bit 14
R
LCV[14]
X
Bit 13
R
LCV[13]
X
Bit 12
R
LCV[12]
X
Bit 11
R
LCV[11]
X
Bit 10
R
LCV[10]
X
Bit 9
R
LCV[9]
X
Bit 8
R
LCV[8]
X
Bit 7
R
LCV[7]
X
Bit 6
R
LCV[6]
X
Bit 5
R
LCV[5]
X
Bit 4
R
LCV[4]
X
Bit 3
R
LCV[3]
X
Bit 2
R
LCV[2]
X
Bit 1
R
LCV[1]
X
Bit 0
R
LCV[0]
X
These registers report the number of line code violations in the previous accumulation period for
the R8FA block #1 through #64.
LCV[15:0]
The LCV[15:0] bits reports the number of line code violations that have been detected since
the last time the LCV registers were polled. The LCV registers are polled by writing to the
TIP register or by writing to this register. Within 10 us of either event, the internally
accumulated error count is transferred to the LCV registers and the internal error counter is
simultaneously reset to begin a new cycle of error accumulation.
When the Diagnose Line Code Violation bit (DLCV) in an upstream device is set to logic 1 in
order to create line code violations, it is possible to saturate this register.
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