參數(shù)資料
型號(hào): T8100A
英文描述: H.100/H.110 Interface and Time-Slot Interchangers
中文描述: H.100/H.110接口和時(shí)隙Interchangers
文件頁數(shù): 15/112頁
文件大小: 1408K
代理商: T8100A
Lucent Technologies Inc.
11
Advance Data Sheet
November 1999
H.100/H.110 Interfaces and Time-Slot Interchangers
Ambassador T8100A, T8102, and T8105
1 Product Overview
(continued)
1.3 Pin Information
(continued)
Table 6. Pin Descriptions: Power Pins
Table 7. Pin Descriptions: Other Pins
Symbol
V
SS
Pin
Ball
Type
Name/Description
11, 23, 37, 49, 57,
72, 86, 100, 103,
105, 109, 111, 117,
119, 121, 127, 138,
143, 153, 163, 173,
184, 204
B2, B16, C3, C15,
D4, D9, D14, H8,
H9, H10, J4, J8, J9,
J10, J14, K8, K9,
K10, L15, N14, P4,
P9, P14, P16, R3,
R15, T2, T15, T16,
U15, U17
A16, D8, D10, F2,
H4, H14, K4, K14,
L16, P8, P10, T9
Chip Ground.
V
DD
14, 32, 46, 63, 79,
93, 107, 124, 132,
148, 158, 168, 178,
193
3.3 V Supply Voltage.
Decouple every V
DD
pin
with a 0.1
μ
F
ceramic capacitor to V
SS
. 1000 pF or
0.01
μ
F capacitors may be used in addition to the
0.1
μ
F capacitor to provide additional decoupling.
Place the capacitor as close to the V
DD
pin as pos-
sible.
Symbol
GP[5:0]
Pin
Ball
Type
I/O
Name/Description
66—71
T5, R6, U5, T6,
R7, P7
U4
General-Purpose Bidirectional Register.
8 mA
drive, Schmitt in, 50 k
internal pull-up.
Output from Selector to Drive DJAT (for
NETREF) or GP Register Bit 6.
8 mA drive, Schmitt in, 50 k
internal pull-up.
Smoothed Input to NETREF Divider and Driv-
ers or GP Register Bit 7.
8 mA drive, input, Schmitt in, 50 k
internal pull-
up.
Serial Output from Connection Memory.
8 mA
drive, 3-state.
Test Type Select.
0 = JTAG, 1 = forced output
test, internal pull-down.
Reserved, No Connection.
TODJAT/GP6
65
I/O
FROMDJAT/GP7
64
R5
I/O
XCS
183
A8
O
TTS
10
D1
I
(NC)
2, 50, 52,
56, 59, 60,
61, 62, 135,
202, 207
A12, B1, B14, B17,
C12, D5, E2, J2,
L3, M17, N16, P6,
R4, R16, T4, U3
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