參數(shù)資料
型號: T8100A
英文描述: H.100/H.110 Interface and Time-Slot Interchangers
中文描述: H.100/H.110接口和時隙Interchangers
文件頁數(shù): 18/112頁
文件大?。?/td> 1408K
代理商: T8100A
14
Lucent Technologies Inc.
Advance Data Sheet
November 1999
H.100/H.110 Interfaces and Time-Slot Interchangers
Ambassador T8100A, T8102, and T8105
2 Architecture and Functional Description
(continued)
Figure 3 shows a block diagram of the TSI devices. The devices operate on a 3.3 V supply for both the core and
I/Os, though the I/Os are TTL compatible and 5 V tolerant.
5-6101.a (F)
* For T8100 and T8100A, there are only 256 locations.
T8102 does not have local data memory.
Figure 3. Block Diagram of the TSI Devices
H.100, H.110, H-MVIP MVIP SC-BUS
INTERNAL
CLOCKS AND
STATE
COUNTER
S/P AND P/S CONVERTERS
512*
LOCATION
DATA
SRAM
THREE 512*
LOCATION
CONNECTION
CAMs
1024
LOCATION
DATA
MEMORY
OUTPUT
LOGIC
AND P/S
CONVERT
INPUT
LOGIC
AND S/P
CONVERT
1024
LOCATION
CONNECTION
MEMORY
TIMING AND
CONTROL
MICROPROCESSOR
INTERFACE
FRAME GROUP
INTERFACE
LOGIC
FRAME
GROUPS
ADDR[1:0]
DATA[7:0]
μ
P CONTROLS
MISC. I/O
CLOCKS AND REFS
INTERNAL
DATA
INTERNAL
ADDRESS
AND
CONTROL
LOCAL OUT
LOCAL IN
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