參數(shù)資料
型號(hào): TLV320AIC36IZQE
廠(chǎng)商: TEXAS INSTRUMENTS INC
元件分類(lèi): 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PBGA80
封裝: 5 X 5 MM, GREEN, PLASTIC, VFBGA-80
文件頁(yè)數(shù): 137/165頁(yè)
文件大?。?/td> 1895K
代理商: TLV320AIC36IZQE
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)當(dāng)前第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)
www.ti.com
SBAS387A – MAY 2009 – REVISED JUNE 2010
5.19.1.3 Sampling Rate and Debounce Period Control
The low frequency oscillator and detect dividers 1 and 2 provide clock generation for the circuit. When
enabled, the LF oscillator provides a nominal frequency of 1MHz to detect divider 1, which in turn provides
a clock source to detect divider 2. The detect divider 2 rate is the sampling rate of the ADC and the clock
source for the detect debouncers. Detect divider 1 is the clock source for the SAR ADC.
The short and long detect debouncers are programmed separately and can generate an interrupt after
detecting a stable window value (0–7) for a minimum number of divider 2 periods. Because one window
will always correspond to a no-buttons pressed ADC value, interrupts generated from this window are
useful for detecting button releases. The short and long debouncers are identical in function but can be
programmed to different values.
5.19.1.4 Application Programming Example – Interrupt Driven
This example register initialization assumes four buttons with raw ADC values of 3, 9, 16, and 23 are
required. Automatic button sampling will be enabled at a rate of 50 Hz and separate interrupts for short
and long pulses of 400 and 800 ms will be generated on INT1 and INT2 respectively. INT1 and INT2 will
be mapped to GPIO1 and GPIO2 respectively.
w 30 00 01 # Change to page 1 w 30 33 60 # Power up EXT_MICBIAS w 30 00 02 # Change to page 2 w
30 70 00 # Enable LF oscillator (1MHz nominal) w 30 15 C8 # Detect divider 1 set to 200 decimal
(1MHz/200) = 5KHz w 30 16 64 # Detect divider 2 set to 100 decimal (5KHz/100) = 50Hz w 30 14 88
# Enable both detect dividers w 30 17 80 # Enable continuous detection mode w 30 1C 86 # Set
and enable threshold 1 to 6 (between 3 and 9) w 30 1D 8C # Set and enable threshold 2 to 12
(between 9 and 16) w 30 1E 94 # Set and enable threshold 3 to 20 (between 16 and 23) w 30 1F 99
# Set and enable threshold 4 to 25 (between 23 and open) w 30 20 00 # Disable threshold 5 w 30
21 00 # Disable threshold 6 w 30 22 00 # Disable threshold 7 w 30 1A 14 # Set short pulse
duration (1/50Hz) * 20 = 400ms w 30 18 80 # Enable short pulse detection w 30 1B 28 # Set long
pulse duration (1/50Hz) * 40 = 800ms w 30 19 80 # Enable long pulse detection w 30 00 00 #
Change to page 0 w 30 34 01 # Enable short detect interrupt to INT1 w 30 35 02 # Enable long
detect interrupt to INT2 w 30 78 14 # Map INT1 to GPIO1 pin w 30 79 20 # Map INT2 to GPIO2 pin
Upon GPIO1 interrupt, read Page 2, Register 0x18 for the short pushbutton value and write 0x01 to page
0 Reg 0x32 to clear the interrupt.
Upon GPIO2 interrupt, read Page 2, Register 0x19 for the long pushbutton value and write 0x02 to page 0
Reg 0x32 to clear the interrupt.
5.19.1.5 Application Programming Example – On-Demand Detect Sampling – Raw ADC
This example provides a fast, raw ADC sample of the detect pin. This feature is useful for determining the
ADC code for a corresponding resistor value. No windowing or de-bouncing is performed in this mode.
w 30 00 01 # Change to page 1 w 30 33 60 # Power up EXT_MICBIAS w 30 00 02 # Change to page 2 w
30 70 00 # Enable LF oscillator (1MHz nominal) w 30 15 01 # Detect divider 1 set to 1 decimal
(1MHz/1) = 1MHz w 30 14 80 # Enable detect divider 1 w 30 17 20 # Initiate on-demand ADC sample
# Poll page 2 Reg 0x17, bit 5 for a 0 (1=in progress; 0=done) # When done, read page 2 Reg
0x17, bits 4-0 for raw ADC code w 30 70 01 # Disable LF oscillator
5.19.1.6 Application Programming Example – On-Demand Detect Sampling – Windowed
This example provides a fast, windowed ADC sample of the detect pin. This feature is useful for software
initiated button detects. No de-bouncing is performed in this mode.
# Perform these steps only at system initialization w 30 00 01 # Change to page 1 w 30 33 60 #
Power up EXT_MICBIAS w 30 00 02 # Change to page 2 w 30 15 01 # Detect divider 1 set to 1
decimal (1MHz/1) = 1MHz w 30 16 01 # Detect divider 2 set to 1 decimal (1MHz/1) = 1MHz # (Using
the window values from the previous example) w 30 1C 86 # Set and enable threshold 1 to 6
(between 3 and 9) w 30 1D 8C # Set and enable threshold 2 to 12 (between 9 and 16) w 30 1E 94 #
Set and enable threshold 3 to 20 (between 16 and 23) w 30 1F 99 # Set and enable threshold 4 to
25 (between 23 and open) w 30 20 00 # Disable threshold 5 w 30 21 00 # Disable threshold 6 w 30
22 00 # Disable threshold 7 w 30 18 00 # Disable short pulse detection # Perform these steps
only at on-demand time w 30 70 00 # Enable LF oscillator (1MHz nominal) w 30 14 88 # Enable
detect divider 1 and 2 w 30 17 20 # Initiate on-demand ADC sample # Poll page Reg 0x17, bit 5
for a 0 (1=in progress; 0=done) # When done, read page 2 Reg 0x18, bits 6-4 for window number w
30 70 01 # Disable LF oscillator
Copyright 2009–2010, Texas Instruments Incorporated
APPLICATION INFORMATION
73
Product Folder Link(s): TLV320AIC36
相關(guān)PDF資料
PDF描述
TLV320DAC23IPW SERIAL INPUT LOADING, 32-BIT DAC, PDSO28
TLV320DAC23IGQER SERIAL INPUT LOADING, 32-BIT DAC, PBGA80
TLV320DAC23PWR SERIAL INPUT LOADING, 32-BIT DAC, PDSO28
TLV320DAC23RHDR SERIAL INPUT LOADING, 32-BIT DAC, PQCC28
TLV320DAC23RHDG4 SERIAL INPUT LOADING, 32-BIT DAC, PQCC28
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLV320AIC36IZQER 功能描述:接口—CODEC Low Pwr Stereo Aud Codec RoHS:否 制造商:Texas Instruments 類(lèi)型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類(lèi)型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320ALC23 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:Evaluation Platform for the TLV320ALC23 Stereo Audio CODEC and TLV230DAC23 Stereo DAC
TLV320ALC31 制造商:BB 制造商全稱(chēng):BB 功能描述:LOW POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
TLV320DA26IRHBG4 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Lo-Pwr Ster DAC w/Hdphn/Spkr Amp RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類(lèi)型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
TLV320DAC23 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:STEREO AUDIO D/A CONVERTER, 8-TO 96KHZ WITH INTERGRATED HEADPHONE AMPLIFIER