參數(shù)資料
型號(hào)： TLV320AIC36IZQE
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PBGA80
封裝： 5 X 5 MM, GREEN, PLASTIC, VFBGA-80
文件頁數(shù)： 150/165頁
文件大?。?/td> 1895K
代理商： TLV320AIC36IZQE
www.ti.com
SBAS387A – MAY 2009 – REVISED JUNE 2010
6.2.25 Page 0 / Register 25:
Audio Interface Setting Register 1
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D6
R/W
00
Audio Interface Selection
00: Audio Interface = I2S
01: Audio Interface = DSP
10: Audio Interface = RJF
11: Audio Interface = LJF
D5–D4
R/W
00
Audio Data Word length
00: Data Word length = 16 bits
01: Data Word length = 20 bits
10: Data Word length = 24 bits
11: Data Word length = 32 bits
D3
R/W
0
BCLK Direction Control
0: BCLK is input to the device
1: BCLK is output from the device
D2
R/W
0
WCLK Direction Control
0: WCLK is input to the device
1: WCLK is output from the device
D1
R
0
Reserved. Write only default value
D0
R/W
0
DOUT High Impendance Output Control
0: DOUT will not be high impedance while Audio Interface is active
1: DOUT will be high impedance after data has been transferred
6.2.26 Page 0 / Register 26:
Audio Interface Setting Register 2, Data offset setting
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
0000 0000
Data Offset Value
0000 0000: Data Offset = 0 BCLK's
0000 0001: Data Offset = 1 BCLK's
…
1111 1110: Data Offset = 254 BCLK's
1111 1111: Data Offset = 255 BCLK's
6.2.27 Page 0 / Register 27:
Audio Interface Setting Register 3
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D6
R
00
Reserved. Write only default values
D5
R/W
0
Loopback control
0: No Loopback
1: Audio Data in is routed to Audio Data out
D4
R/W
0
Loopback control
0: No Loopback
1: Stereo ADC output is routed to Stereo DAC input
D3
R/W
0
Audio Bit Clock Polarity Control
0: Default Bit Clock polarity
1: Bit Clock is inverted with respect to default polarity
D2
R/W
0
Primary BCLK and Primary WCLK Power control
0: Primary BCLK and Primary WCLK buffers are powered up when they are used in clock
generation even when the codec is powered down
1: Priamry BCLK and Primary WCLK buffers are powered down when the codec is powered down
Copyright 2009–2010, Texas Instruments Incorporated
REGISTER MAP
85
Product Folder Link(s): TLV320AIC36
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLV320AIC36IZQER 功能描述:接口—CODEC Low Pwr Stereo Aud Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320ALC23 制造商:TI 制造商全稱:Texas Instruments 功能描述:Evaluation Platform for the TLV320ALC23 Stereo Audio CODEC and TLV230DAC23 Stereo DAC
TLV320ALC31 制造商:BB 制造商全稱:BB 功能描述:LOW POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
TLV320DA26IRHBG4 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Lo-Pwr Ster DAC w/Hdphn/Spkr Amp RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
TLV320DAC23 制造商:TI 制造商全稱:Texas Instruments 功能描述:STEREO AUDIO D/A CONVERTER, 8-TO 96KHZ WITH INTERGRATED HEADPHONE AMPLIFIER
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