參數(shù)資料
型號(hào): TLV320AIC36IZQE
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PBGA80
封裝: 5 X 5 MM, GREEN, PLASTIC, VFBGA-80
文件頁(yè)數(shù): 81/165頁(yè)
文件大?。?/td> 1895K
代理商: TLV320AIC36IZQE
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)當(dāng)前第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)
(P2R48)
(P2R46)
(P2R49)
(P2R45)
(P2R50)
(P2R47)
HPRVolume
(0 to -78dB)
(P2R62)
(P2R60)
(P2R63)
(P2R59)
(P2R64)
(P2R61)
DAC_L
DAC_R
LINEIN_L
LINEIN_R
PGA_L
PGA_R
RECL Volume
(0 to -78dB)
(P2R55)
(P2R53)
(P2R56)
(P2R52)
(P2R57)
(P2R54)
HPL Volume
(0 to -78dB)
(P2R69)
(P2R67)
(P2R70)
(P2R66)
(P2R71)
(P2R68)
RECRVolume
(0 to -78dB)
(P2R86)
LINEOUT_L Volume
(0 to -78dB)
Gain:
0 to +9 dB
(P2R90)
(P2R88)
(P2R91)
(P2R87)
(P2R92)
(P2R89)
(P2R93)
LINEOUT_RVolume
(0 to -78dB)
(P2R83)
(P2R81)
(P2R84)
(P2R80)
(P2R85)
(P2R82)
Gain:
0 to +9 dB
(P2R65)
+
DAC_L
DAC_R
LINEIN_L
LINEIN_R
PGA_L
PGA_R
Gain:
0 to +9 dB
(P2R58)
+
DAC_L
DAC_R
LINEIN_L
LINEIN_R
PGA_L
PGA_R
Gain:
0 to +9 dB
(P2R51)
+
DAC_L
DAC_R
LINEIN_L
LINEIN_R
PGA_L
PGA_R
Gain:
0 to +9 dB
(P2R72)
+
(P2R36)
DAC_L
DAC_R
LINEIN_L
LINEIN_R
PGA_L
PGA_R
DAC_L
DAC_R
LINEIN_L
LINEIN_R
PGA_L
PGA_R
+
Gain:
0 to +9 dB
(P1R59)
Gain:
0 to +46.5 dB
LINEIN_L
InputMUX
(P1R52)
MIC1_P
EXTMIC_P
MIC1_M
InputMUX
(P1R54)
EXTMIC_M
VCM_ADC
(P1R60)
Gain:
0 to +46.5 dB
VCM_ADC
InputMUX
(P1R57)
EXTMIC_M
MIC2_M
EXTMIC_P
InputMUX
(P1R55)
MIC2_P
LINEIN_R
V
C
M
(P
1
R
1
0
)
ADC
L
+
ADC
R
DAC
L
DAC
R
(P2R40)
LINEIN _R (G 7)
MIC 2_P (H8)
MIC2 _M (G 8)
EXTMIC _M (J7)
VCM_ ADC (J9)
MIC1_M (H6)
EXTMIC _P (H7)
MIC1_P (J6)
LINEIN _L (G 6)
LINEOUT _RM (A8 )
LINEOUT _RP (C6 )
LINEOUT _LM (A7)
LINEOUT _LP (B6 )
HPL (F7)
HPR (F9)
HP_ COM (J8)
GND _HP (E7)
RECL (D8)
RECR ( D9)
DACPwr (P2R37 )
DACCurrentCtrl
(P2R107 )
ADCPwr (P0 R81 )
OpenCircuit
Detect
(P2R108)
OpenCircuit
Detect
(P2R108)
OpenCircuit
Detect
(P2R108)
OpenCircuit
Detect
(P2R108)
AlloutputVolume
Gainsarein 0. 5dBsteps
AlloutputGains
arepositivein 1dBsteps
CommonControls:
SCProtection:(P2R38)
GainSoft-Stepping:(P2R40)
PopReduction:(P2R42)
miniDSP
SBAS387A – MAY 2009 – REVISED JUNE 2010
www.ti.com
5.4
Analog Routing
Figure 5-2. Analog Routing Diagram
5.4.1
Analog Bypass
The TLV320AIC36 offers two analog-bypass modes, line input bypass and PGA bypass mode. For these
modes, all LDOs and the ADC must be enabled. The DAC does not need to be enabled to save power.
5.4.2
Line Input Bypass
This mode routes LINEINL/R to any of the output amplifiers by configuring Page 2, Register 40 and by
programming the output amplifiers to select one or both line inputs. See Figure 5-2. Under normal bypass
operation, the line inputs are AC-coupled to the LINEIN_L/LINEIN_R pins. The ADC generates an internal
commode mode voltage for these signals before the bypass amplifiers. The bypass amplifiers have a fixed
gain of 0 dB for single-ended output to HPL_R and RECL_R, and 6-dB gain for differential output to
LINEOUT_L/LINEOUT_R.
To save power, the ADC can be disabled and an external common mode voltage can be generated for
these pins. A simple 20k
/20k resistor divider from AVDD_ADC to GND_ADC is sufficient with some
compromise in performance.
5.4.3
PGA Bypass
In this mode, the mic or line input signals are amplified by the PGA and routed to the output amplifiers.
See figure 5-2. This mode is enabled by selecting the input mux, setting the PGA gain, and programming
the output amplifiers to select one or both PGA outputs.
22
APPLICATION INFORMATION
Copyright 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC36
相關(guān)PDF資料
PDF描述
TLV320DAC23IPW SERIAL INPUT LOADING, 32-BIT DAC, PDSO28
TLV320DAC23IGQER SERIAL INPUT LOADING, 32-BIT DAC, PBGA80
TLV320DAC23PWR SERIAL INPUT LOADING, 32-BIT DAC, PDSO28
TLV320DAC23RHDR SERIAL INPUT LOADING, 32-BIT DAC, PQCC28
TLV320DAC23RHDG4 SERIAL INPUT LOADING, 32-BIT DAC, PQCC28
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLV320AIC36IZQER 功能描述:接口—CODEC Low Pwr Stereo Aud Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320ALC23 制造商:TI 制造商全稱:Texas Instruments 功能描述:Evaluation Platform for the TLV320ALC23 Stereo Audio CODEC and TLV230DAC23 Stereo DAC
TLV320ALC31 制造商:BB 制造商全稱:BB 功能描述:LOW POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
TLV320DA26IRHBG4 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Lo-Pwr Ster DAC w/Hdphn/Spkr Amp RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
TLV320DAC23 制造商:TI 制造商全稱:Texas Instruments 功能描述:STEREO AUDIO D/A CONVERTER, 8-TO 96KHZ WITH INTERGRATED HEADPHONE AMPLIFIER