參數(shù)資料
型號(hào)： TLV320AIC36IZQE
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PBGA80
封裝： 5 X 5 MM, GREEN, PLASTIC, VFBGA-80
文件頁數(shù)： 84/165頁
文件大?。?/td> 1895K
代理商： TLV320AIC36IZQE
www.ti.com
SBAS387A – MAY 2009 – REVISED JUNE 2010
Table 5-1. Analog PGA vs Input Configuration
Page 1,
EFFECTIVE GAIN APPLIED BY PGA
Register 59, D(6:0)
SINGLE-ENDED
DIFFERENTIAL
Page 1,
RIN = 10K
RIN = 20K
RIN = 40K
RIN = 10K
RIN = 20K
RIN = 40K
Register 60, D(6:0)
000 0000
0 dB
–6 dB
–12 dB
6.0 dB
0 dB
–6.0 dB
000 0001
0.5 dB
–5.5 dB
–11.5 dB
6.5 dB
0.5 dB
–5.5 dB
000 0010
1.0 dB
–5.0 dB
–11.0 dB
7.0 dB
7.5 dB
–5.0 dB
…
101 1110
47.0 dB
41.0 dB
35.0 dB
53.0 dB
47.0 dB
41.0 dB
101 1111
47.5 dB
41.5 dB
35.5 dB
53.5 dB
47.5 dB
41.5 dB
The gain changes are implemented with an internal soft-stepping algorithm that only changes the actual
volume level by one 0.5-dB step every one or two ADC output samples, depending on the register value
(see registers Page 0, Reg 81, D(1:0)). This soft-stepping enables smooth volume-control changes with no
audible artifacts. On reset, the PGA gain defaults to a mute condition, and at power down, the PGA
soft-steps the volume to mute before shutting down. A read-only flag Page 0, Reg 36, D(7) and D(3) is set
whenever the gain applied by the PGA equals the desired value set by the register. The soft-stepping
control can also be disabled by programming Page 0, Reg 81, D(1:0).
5.7.2
Digital Volume Control
The TLV320AIC36 also has a digital volume-control block with a range from –12 dB to +20 dB in steps of
0.5-dB. It is set by programming Page 0, Register 83 and 84, respectively, for left and right channels.
Table 5-2. Digital Volume Control for ADC
Desired Gain
Left/Right Channel
(dB)
Page 1, Register 83/84,
D(6:0)
–12.0
110 1000
–11.5
110 1001
–11.0
110 1010
..
–0.5
111 1111
0.0
000 0000 (default)
+0.5
000 0001
..
+19.5
010 0111
+20.0
010 1000
During volume control changes, the soft-stepping feature is used to avoid audible artifacts. The
soft-stepping rate can be set to either 1 or 2 gain steps per sample. Soft-stepping can also be entirely
disabled. This soft-stepping is configured using Page 1, Register 81, D(1:0), and is common to
soft-stepping control for the analog PGA. During power-down of an ADC channel, this volume control
soft-steps down to –12.0 dB before powering down. Due to the soft-stepping control, soon after changing
the volume control setting or powering down the ADC channel, the actual applied gain may be different
from the one programmed through the control register. The TLV320AIC36 gives feedback to the user,
through read-only flags Page 1, Reg 36, D(7) for the Left Channel and Page 1, Reg 36, D(3) for the right
channel.
Copyright 2009–2010, Texas Instruments Incorporated
APPLICATION INFORMATION
25
Product Folder Link(s): TLV320AIC36
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