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LIST OF TABLES (2/4)
Table No.
Title
Page
3-1.
3-2.
3-3.
3-4.
Description of Pipeline Activities during Each Stage..................................................................
Description of Pipeline Stall .......................................................................................................
Description of Pipeline Slip ........................................................................................................
Description of Pipeline Exception...............................................................................................
37
46
47
47
4-1.
4-2.
4-3.
4-4.
4-5.
4-6.
4-7.
Comparison of useg and xuseg .................................................................................................
32-bit and 64-bit Supervisor Mode Segments............................................................................
32-bit Kernel Mode Segments....................................................................................................
64-bit Kernel Mode Segments....................................................................................................
Cacheability and the xkphys Address Space.............................................................................
Cache Algorithm.........................................................................................................................
Mask Values and Page Sizes ....................................................................................................
60
62
65
66
67
74
75
5-1.
5-2.
5-3.
5-4.
CP0 Exception Processing Registers ........................................................................................
Cause Register Exception Code Field.......................................................................................
64-Bit Mode Exception Vector Base Addresses ........................................................................ 100
Exception Priority Order............................................................................................................. 101
86
93
6-1.
6-2.
6-3.
6-4.
6-5.
6-6.
6-7.
6-8.
6-9.
6-10.
6-11.
6-12.
System Bus Interface Signals ................................................................................................... 124
Clock Interface Signals .............................................................................................................. 125
Battery Monitor Interface Signals............................................................................................... 126
Initialization Interface Signals..................................................................................................... 126
RS-232-C Interface Signals ....................................................................................................... 127
IrDA Interface Signals................................................................................................................ 127
Debug Serial Interface Signals................................................................................................... 128
Keyboard Interface Signals........................................................................................................ 128
Audio Interface Signal................................................................................................................ 129
Touch Panel Interface Signals................................................................................................... 129
General-purpose I/O Signals...................................................................................................... 130
Status of Pins upon a Reset ...................................................................................................... 131
10-1.
10-2.
10-3.
10-4.
10-5.
10-6.
BCU Registers ........................................................................................................................... 169
Address Map of the V
R
4101....................................................................................................... 180
Detailed Address Map for the ROM........................................................................................... 180
16-Bit Device Mode for the Expansion I/O................................................................................. 181
8-Bit Device Mode for the Expansion I/O................................................................................... 181
16-Bit Device Mode for the Expansion Memory......................................................................... 181