![](http://datasheet.mmic.net.cn/370000/-PD30101_datasheet_16680756/-PD30101_7.png)
- i -
SUMMARY OF CONTENTS
CHAPTER 1
INTRODUCTION............................................................................................
1
CHAPTER 2
CPU INSTRUCTION SET SUMMARY .............................................................
23
CHAPTER 3
V
R
4101 PIPELINE..........................................................................................
35
CHAPTER 4
MEMORY MANAGEMENT SYSTEM...............................................................
53
CHAPTER 5
EXCEPTION PROCESSING...........................................................................
85
CHAPTER 6
PIN FUNCTIONS ........................................................................................... 123
CHAPTER 7
INITIALIZATION INTERFACE ......................................................................... 135
CHAPTER 8
CACHE ORGANIZATION AND OPERATION.................................................... 147
CHAPTER 9
CPU CORE INTERRUPTS.............................................................................. 165
CHAPTER 10
BCU (BUS CONTROL UNIT) .......................................................................... 169
CHAPTER 11
DMAAU (DMA ADDRESS UNIT)..................................................................... 203
CHAPTER 12
DCU (DMA CONTROL UNIT)..........................................................................
211
CHAPTER 13
CMU (CLOCK MASK UNIT)............................................................................ 217
CHAPTER 14
ICU (INTERRUPT CONTROL UNIT)................................................................ 221
CHAPTER 15
PMU (POWER MANAGEMENT UNIT) ............................................................ 243
CHAPTER 16
RTC (REALTIME CLOCK UNIT)...................................................................... 255
CHAPTER 17
DSU (DEADMAN’S SW UNIT)......................................................................... 267
CHAPTER 18
GIU (GENERAL PURPOSE I/O UNIT)............................................................. 273
CHAPTER 19
PIU (TOUCH PANEL INTERFACE UNIT)......................................................... 283
CHAPTER 20
SIU (SERIAL INTERFACE UNIT)..................................................................... 307
CHAPTER 21
AIU (AUDIO INTERFACE UNIT)...................................................................... 327
CHAPTER 22
KIU (KEYBOARD INTERFACE UNIT).............................................................. 349
CHAPTER 23
DEBUGSIU (DEBUG SERIAL INTERFACE UNIT) ............................................ 373
CHAPTER 24
CPU INSTRUCTION SET DETAILS................................................................. 385
CHAPTER 25
V
R
4101 COPROCESSOR 0 HAZARDS........................................................... 537
CHAPTER 26
PLL PASSIVE COMPONENTS........................................................................ 543
APPENDIX
INDEX........................................................................................................... 545