- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1916 > DS34S132GN+ (Maxim Integrated Products)IC TDM OVER PACKET 676-BGA PDF資料下載
參數(shù)資料
| 型號： | DS34S132GN+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 123/194頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TDM OVER PACKET 676-BGA |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 40 |
| 功能： | TDM-over-Packet（TDMoP） |
| 接口： | TDMoP |
| 電路數(shù)： | 1 |
| 電源電壓： | 1.8V, 3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 676-BGA |
| 供應商設備封裝： | 676-PBGA（27x27） |
| 包裝： | 管件 |
| 其它名稱： | 90-34S13+2N0 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁當前第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁
DS34S132 DATA SHEET
19-4750; Rev 1; 07/11
34 of 194
of the Sequence Number. Both Timestamp types provide a measure of time, one referenced to a common clock,
the other referenced to the receive TDM Port line rate.
In the TXP direction the S132 supports all 3 techniques. The ACR technique is implicit in the packet transmit rate.
The DCR-DT and AT techniques are supported by transmitting Differential or Absolute Timestamps (respectively).
In the RXP direction the S132 directly supports the ACR and DCR-DT techniques. With the ACR technique the
Clock Recovery Engine recovers timing from the rate at which packets are received. With DCR-DT the Clock
Recovery Engine recovers timing from the received RTP Differential Timestamps.
In the RXP direction the S132 is compatible with (supports) the AT technique, but does not utilize the RTP Absolute
Timestamps. To provide compatibility with the AT technique the Clock Recovery Engine instead recovers timing
using the ACR technique (derived from the rate at which packets are received).
9.2.1.1.1 RXP Clock Recovery (RXP PW-Timing)
There are 32 RXP Clock Recovery Engines, one hardwired to each of the 32 TDM Ports. Each can be programmed
to support the ACR or DCR-DT technique.
Figure 9-8. Clock Recovery Engine Environment
DS34S132
RXP Timing
Xmt TDM Timing
TDM
Xmt Port
RXP Pkt
Classifier
RXP SAT/CES Engine Timing
Clock Recovery Engines
When a Transmit TDM Port is programmed to derive its timing from a Clock Recovery Engine, one TDMoP
PW/Bundle must be programmed to include an RXP PW-Timing Connection (B.BCDR4.PCRE). No more than one
PW/Bundle can be assigned to provide the RXP PW-Timing Connection for a TDM Port.
The RXP Clock Recovery technique (ACR or DCR-DT) is selected by properly programming the S132 Clock
Recovery Engine DSP firmware revision (not included in this Datasheet).
9.2.1.1.2 TXP PW-Timing
In the TXP direction the TDMoP PWs communicate timing information through the transmission rate of the TXP
Packets (ACR) and can optionally include an RTP Timestamp with each TXP Packet. TXP Packets are
automatically transmitted when sufficient T1/E1 data has been received to fill the TXP Packet payload. A TXP PW-
Timing Connection is only required if a TXP RTP Timestamp is included in the TXP packets.
The S132 appends a header to the payload of each TXP TDMoP Packet as it is transmitted. The header is
programmed using a TXP Header Descriptor that is stored in a block of memory at EMI.BMCR1.TXHSO (1 TXP
Header Descriptor per Bundle). A TXP PW-Timing Connection is enabled when the TXP Header Descriptor for a
Bundle is programmed to insert a TXP RTP Timestamp (TXRE field = 1; see “TXP SAT/CES and HDLC PW Packet
Generation” section). Any number of TXP Bundles can be programmed to include an RTP Header.
Figure 9-9. TXP PW-Timing Environment
DS34S132
TXP Timing
TXP Pkt
Generator
TXP SAT/CES Engine Timing
RTP Timestamp Generator
Rcv TDM Timing
TDM
Rcv Port
In the TXP direction, to conform to the Clock Recovery technique that is used at the far end PW end point, the
S132 allows the RTP Header to be optionally enabled with a Differential Timestamp or Absolute Timestamp,
independent of the RXP RTP settings. Pn.PRCR4.TSGMS selects whether Differential or Absolute Timestamps are
inserted when the RTP Header has been enabled in the TXP Header Descriptor.
RTP Differential Timestamp values are generated using the CMNCLK input and 3 coefficients that are programmed
in the Pn.PRCR4.TSGMC, Pn.PRCR5.TSGN1C and Pn.PRCR5.TSGN0C registers (programmed per TDM Port).
When the RTP Absolute Timestamp is enabled, the Absolute Timestamp values are incremented according to the
receive TDM Port timing (Pn.PRCR2.RSS selects the receive TDM Port timing as either RCLKn or TCLKOn).
相關PDF資料 |
PDF描述 |
|---|---|
| DS34T102GN+ | IC TDM OVER PACKET 484TEBGA |
| DS3501U+H | IC POT NV 128POS HV 10-USOP |
| DS3502U+ | IC POT DGTL NV 128TAP 10-MSOP |
| DS3503U+ | IC POT DGTL NV 128TAP 10-MSOP |
| DS3897MX | IC TXRX BTL TRAPEZIODAL 20-SOIC |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS34S132GN+ | 功能描述:通信集成電路 - 若干 32Port TDM-Over-Pack Transport Device RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| DS34S132GNA2+ | 功能描述:通信集成電路 - 若干 32Port TDM-Over-Pack Transport Device RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| DS34T101 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip |
| DS34T101_08 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip |
| DS34T101_09 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip |
發(fā)布緊急采購，3分鐘左右您將得到回復。