19-4750; Rev 1; 07/11 54 of 194 (G.GCR.EC25 = 0)." />
參數(shù)資料
型號(hào): DS34S132GN+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 145/194頁(yè)
文件大?。?/td> 0K
描述: IC TDM OVER PACKET 676-BGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 40
功能: TDM-over-Packet(TDMoP)
接口: TDMoP
電路數(shù): 1
電源電壓: 1.8V, 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 676-BGA
供應(yīng)商設(shè)備封裝: 676-PBGA(27x27)
包裝: 管件
其它名稱: 90-34S13+2N0
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DS34S132 DATA SHEET
19-4750; Rev 1; 07/11
54 of 194
(G.GCR.EC25 = 0). In some cases ETHCLK can be tied to RXCLK to have the Phy device drive both inputs at one
time (as long as the RXCLK output from the Phy is a constant, non-gapped 125 MHz signal).
M.NET_CONTROL.TXP_HALT, START_TXP, TXP_EN and RXP_EN enable/disable the flow of RXP and TXP
data at the Ethernet MAC/Port.
The MAC must be programmed to operate in the Full-duplex mode (M.NET_CONFIG.EN_FRMS_UDUP = 0 and
M.NET_CONFIG.FULL_DUPLEX = 1). The Half-duplex mode and Pause Control are not supported because they
can adversely affect the delay/latency of the PW packets.
The standard maximum Ethernet Frame size is 1518 bytes. The MAC can be programmed to accept RXP Ethernet
frames with byte lengths of 1518 bytes or 1536 bytes using M.NET_CONFIG.RXP_1536FRMS or up to 2000 bytes
using M.NET_CONFIG.JUMBO_FRMS.
The MAC can be programmed to accept or discard all non-VLAN frames using M.NET_CONFIG.DISC_NOVLAN.
The MAC, when programmed as prescribed in the “Register Guide”, “Global Ethernet MAC” section, checks each
received RXP packet for valid Ethernet preamble, FCS, alignment and length. Packets with errors are discarded. In
the TXP direction the MAC appends an Ethernet FCS and adds padding to packets that are < 64-bytes in length.
The MDIO interface can be enabled using M.MAN_PORT_EN, and programmed using the M.PHY_MAN and
M.NET_STATUS registers.
MDC (MDIO Clock) is divided down from the SYSCLK input. MDC_CLK_DIV sets the “divided by” value and should
be set such that MDC frequency = SYSCLK ÷ (selected MDC_CLK_DIV divider value) ≤ 2.5 MHz. For example if
SYSCLK = 50 MHz and MDC_CLK_DIV = 010b (selects divide by 32), then the MDC frequency will be 1.56 MHz.
9.3.1.1 Ethernet Port Diagnostic Functions
The S132 supports Ethernet Loopback and Packet BERT Functions for diagnostic testing of the Ethernet Port.
9.3.1.1.1 Ethernet Loopback
The M.NET_CONTROL.LB_LOCAL = 1 enables the Ethernet Port Loopback that sends all receive TXP packet
data back in the RXP direction. CES, SAT, HDLC and Clock data/information that is received at a TDM Port is
encapsulated into TXP packets using the programmed Bundle settings. TXP packets that are initiated by the CPU
are also encapsulated into TXP CPU Packets. The combination of all TXP packet types is looped back in the RXP
direction. The RXP packets are forwarded according to the programmed RXP Bundle settings (forwarded to the
TDM Ports and/or CPU). No data is transmitted toward the Ethernet Phy and no data is received from the Ethernet
Phy while the Ethernet loopback is active. This loopback is depicted in Figure 9-21 using a T1/E1 example (the
loopback of TXP CPU packets to the CPU is not depicted).
Figure 9-21. Ethernet Port Local Loopback
9.3.1.1.2 Packet BERT
An Ethernet path can be tested using a BERT Test Pattern. The S132 supports “Full Channel” and “Half Channel”
Packet BERT Testing. Only one Packet BERT Test can be enabled on an S132 device at a time. The “Full
Channel” and “Half Channel” BERT Tests are depicted in Figure 9-22.
S132
Ethernet
Phy
T1/E1
Framer/LIU
X
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