參數(shù)資料
型號: L64007
廠商: LSI CORP
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP160
封裝: PLASTIC, QFP-160
文件頁數(shù): 125/166頁
文件大?。?/td> 1015K
代理商: L64007
Arch
53 Wed May 28 17:36:23 1997
Draft 1/21/97
L64007 MPEG-2, DVB, JSAT Transport Demultiplexer Technical Manual
2-53
PRE.4 for Rev. D
Copyright 1997 by LSI Logic Corporation. All rights reserved.
Figure 2.47 shows the blocks used in a DMA transfer of data between
the host processor bus and the external DRAM device.
Figure 2.47
Transfer of Data
Between DRAM
and Host Using
DMA Transfer
Mode
Figure 2.48 shows typical DMA Read and DMA Write bus timing.
Figure 2.48
DMA Read and
Write Bus Timing
2.5.2
Host Processor
Interrupt
The host processor interface supports the output interrupt line. This line
is driven by an internal interrupt event. There are several events that can
generate an interrupt to the host processor. The host processor has the
capability to mask an internal interrupt from driving the external interrupt
line. This is done through the Interrupt Mask Register. To learn more
about the interrupt source, the host processor can read the L64007’s var-
ious status registers. Flags set in the status registers correspond to inter-
PID#n
Write Pointer
DMA Pointer
DMA
Buffer
Host Interface
Burst Level
Fast Page Mode
Transfer
External
DRAM
Device
DREQ
DACK
BURST
TRANSFER
BURST
TRANSFER
BURST
TRANSFER
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