參數資料
型號: L64007
廠商: LSI CORP
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP160
封裝: PLASTIC, QFP-160
文件頁數: 154/166頁
文件大小: 1015K
代理商: L64007
register
6 Wed May 28 17:37:25 1997
Draft 1/21/97
4-6
Registers
PRE.4 for Rev. D
Copyright 1997 by LSI Logic Corporation. All rights reserved.
4.2.2
Filter Control
Register 1
(FCR1)
FCR1 is a 16-bit read or write control register that controls the operation
of the PPU.
DES
Destination
15
This bit determines the destination of the payload carried
in this PID. When this bit is set to 1, the payload is posted
to the cyclic buffer associated with this PID in the external
DRAM. When this bit is set to 0, the payload is posted to
the Host Processor DMA buffer.
EI
Enable Interrupt
14
When set to 1, this bit enables an interrupt to be gener-
ated when the PPU nishes processing this PID. The sta-
tus word for this PID is stored in the PID Processor
Status Queue. When reset to 0, this PID does not gener-
ate an interrupt, and no status word is saved in the PID
Status Queue.
Bit Setting
Description
0000000000000
PID for Program Association
Table (PAT).
0000000000001
PID for Conditional Access
Table (CAT).
0000000000010
ISO reserved.
0000000000011
ISO reserved.
.
0000000001111
ISO reserved.
0000000010000
User reserved.
0000000010001
User reserved.
.
1111111111110
User reserved.
1111111111111
Null packet. Packet will be
discarded.
15
14
13
12
11
10
9
8
7
0
DES
EI
ACT
Reserved
PSI/PES AF AUX
Reserved
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