參數(shù)資料
型號: L64007
廠商: LSI CORP
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP160
封裝: PLASTIC, QFP-160
文件頁數(shù): 129/166頁
文件大?。?/td> 1015K
代理商: L64007
Arch
57 Wed May 28 17:36:23 1997
Draft 1/21/97
L64007 MPEG-2, DVB, JSAT Transport Demultiplexer Technical Manual
2-57
PRE.4 for Rev. D
Copyright 1997 by LSI Logic Corporation. All rights reserved.
The A/V Serial interface includes special-purpose data rate control logic
that allows controlling the maximum combined audio and video output
data rate. It also provides another control option for the user to specify
the data rate ratio between the video and the audio PES streams. The
combined output data rate can be programmed from 3.375Mbit/s to
27Mbit/s. Regardless of the programmed data rate, the chip outputs PES
video and PES audio only if the associated request lines are active. This
prevents overowing the channel buffers in these decoders. When inter-
facing with the L64002/L64005, the recommended AV_RATE is 27MHz.
Each bit can be programmed to contain video or audio data. Table 2.1
shows the output data format. State control logic in the Serial Output
Control Logic determines the content of the data bits (video, audio, or
null) based on the status of the internal video and audio FIFO structures,
Video and Audio Request inputs, and programmed data delivery rate. In
parallel mode, 8-bit words are output in the same pattern, but at one
eighth the duty cycle.
AVCLK
Host Processor Interface
Control
AVSD
VVALID
AVALID
AVERR
VREQ
AREQ
L64002
SYSCLK
27 MHz
SERI
SCKLI
VVALID
AVALID
ERROR
AREQ
VREQ
L64007
Control
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