參數(shù)資料
型號(hào): L64007
廠商: LSI CORP
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP160
封裝: PLASTIC, QFP-160
文件頁數(shù): 139/166頁
文件大?。?/td> 1015K
代理商: L64007
Draft 1/16/97
3-2
Signal Denitions
PRE.4 for Rev. D
Copyright 1997 by LSI Logic Corporation. All rights reserved.
3.1
Host Processor
Interface
A[19:0]
Address Bus
Input
This 20-bit bus is used by the external host processor to
directly access internal L64007 registers or the external
DRAM through the L64007. The address presented to
the L64007 on the address lines A[19:0] is latched on the
HIGH-to-LOW transition of the AS signal. A bus cycle
occurs only if CS becomes active. A[19:0] provides
access to a 16-bit word. Byte access is done by activat-
ing the UDSor LDS signal.
AS
Address Strobe
Input
A HIGH-to-LOW transition on AS latches the host proces-
sor address value presented on the address lines
A[19:0]. Only when the CS signal becomes LOW does it
indicate an attempt by the external host processor to
access internal L64007 registers.
L64007
Host
Processor
Channel
Decoder
Audio Clock
Buffer
A/V
DTACK
AS
CS
UDS
R/W
D[15:0]
RESET
INTR
DREQ
DACK
MCLK_SDC
BOE
BWE
RAS
CASH
BA[9:0]
BD[15:0]
CDEN
CD[7:0]
CDCLK
CDERR
AVCLK
AVSD
VVALID
AVALID
AUXD[7:0]
AV_CS
AV_WAIT
ACLK
VREQ
AREQ
IREF
AVSS
AVDD
A[19:0]
AVERR
CDRDY
CDSYNC
AUXV
AUX Port
Interface
Pass-Through
CASL
MCLK
Interface
System and
LDS
Decoder
Interface
Memory
Interface
Audio Clocks
VCxO Master
Clock
Interface
L64002 Host
Processor Interface
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