Arch
16 Wed May 28 17:36:23 1997
Draft 1/21/97
2-16
Architecture
PRE.4 for Rev. D
Copyright 1997 by LSI Logic Corporation. All rights reserved.
The PPU can accept the three transport structure types shown in
Figure 2.13
Transport structures
accepted by the PPU
If the Adaptation Field control bits in the header are 01, the transport
structure is of type 1; if they are 10, it is of type 2; if they are 11, it is of
type 3. Note that the 00 setting for the FC bits is not allowed.
The PPU parses the transport packet header information and the adap-
tation elds. The PPU fetches transport data from the channel FIFO until
the FIFO is empty. The channel FIFO empty condition does not cause
an underow in the L64007; rather, the PPU pauses processing momen-
tarily and resumes operation when data is written into the channel FIFO.
This feature is important in delivery systems with jitter, such as ATM net-
works.
The PPU reads data from the channel FIFO in 188-byte packets. A user-
programmable, special-purpose Attribute Control Register File (this
ACRF consists of Groups 0, 1, and 2, shown in
Figure 4.1) controls the
PID Processor operation. The ACRF is an array of 32 registers and the
match and mask patterns in Group0; it contains 32 user-programmable
PID values of 13 bits each, and a set of control attributes that instruct
the PPU to perform a set of processing tasks for each PID.
To better understand how the PPU works, consider
Figure 2.14, which
shows the components of the PPU, the PID Pre-processor, and the PID
Post-processor.
Header
Payload
4 bytes
184 bytes
Header
Adaptation Field
4 bytes
184 bytes
Header
Payload
4 bytes
184 bytes
Adaptation Field
e 1
e 2
e 3