Table of Contents
xii
MC68307 USER’S MANUAL
MOTOROLA
Section 8
Serial Module
8.1
Module Overview .......................................................................................... 8-2
8.1.1
Serial Communication Channel .................................................................. 8-2
8.1.2
Baud Rate Generator Logic ........................................................................ 8-3
8.1.3
Baud Rate Generator/Timer ....................................................................... 8-3
8.1.4
Interrupt Control Logic ................................................................................ 8-3
8.1.5
Comparison of Serial Module to MC68681................................................. 8-3
8.2
Serial Module Signal Definitions ................................................................... 8-3
8.2.1
Transmitter Serial Data Output (TxD) ......................................................... 8-4
8.2.2
Receiver Serial Data Input (RxD) ............................................................... 8-4
8.2.3
Request-To-Send (RTS)............................................................................. 8-4
8.2.4
Clear-To-Send (CTS) ................................................................................. 8-5
8.3
Operation ...................................................................................................... 8-5
8.3.1
Baud Rate Generator/Timer ....................................................................... 8-5
8.3.2
Transmitter and Receiver Operating Modes............................................... 8-5
8.3.2.1
Transmitter ............................................................................................... 8-6
8.3.2.2
Receiver ................................................................................................... 8-8
8.3.2.3
FIFO Stack ............................................................................................... 8-8
8.3.3
Looping Modes ......................................................................................... 8-10
8.3.3.1
Automatic Echo Mode ............................................................................ 8-10
8.3.3.2
Local Loopback Mode ............................................................................ 8-11
8.3.3.3
Remote Loopback Mode ........................................................................ 8-11
8.3.4
Multidrop Mode ......................................................................................... 8-12
8.3.5
Bus Operation........................................................................................... 8-14
8.3.5.1
Read Cycles ........................................................................................... 8-14
8.3.5.2
Write Cycles ........................................................................................... 8-14
8.3.5.3
Interrupt Acknowledge Cycles ................................................................ 8-14
8.4
Register Description and Programming...................................................... 8-14
8.4.1
Register Description ................................................................................. 8-14
8.4.1.1
Mode Register 1 (UMR1) ....................................................................... 8-15
8.4.1.2
Mode Register 2 (UMR2) ....................................................................... 8-17
8.4.1.3
Status Register (USR) ............................................................................ 8-19
8.4.1.4
Clock-select Register (UCSR) ................................................................ 8-21
8.4.1.5
Command Register (UCR) ..................................................................... 8-23
8.4.1.6
Receiver Buffer (URB)............................................................................ 8-25
8.4.1.7
Transmitter Buffer (UTB) ........................................................................ 8-25
8.4.1.8
Input Port Change Register (UIPCR) ..................................................... 8-26
8.4.1.9
Auxiliary Control Register (UACR) ......................................................... 8-26
8.4.1.10
Interrupt Status Register (UISR) ............................................................ 8-27
8.4.1.11
Interrupt Mask Register (UIMR).............................................................. 8-28
8.4.1.12
Timer Upper Preload Register (UBG1)................................................... 8-29
8.4.1.13
Timer Upper Preload Register (UBG2)................................................... 8-29
8.4.1.14
Interrupt Vector Register (UIVR) ............................................................ 8-29
8.4.1.15
Input Port Register (UIP) ........................................................................ 8-29