MOTOROLA
MC68307 USER’S MANUAL
4-1
SECTION 4
EC000 CORE PROCESSOR
The EC000 core has a 16-bit data bus and 32-bit address bus while the full architecture pro-
vides for 32-bit address and data register operations.
4.1 FEATURES
The following resources are available to the EC000 core:
Eight 32-Bit Address Registers
Eight 32-Bit Data Registers
56 Powerful Instructions
Operations on Five Main Data Types
Memory-Mapped Input/Output (I/O)
14 Addressing Modes
4.2 PROCESSING STATES
The processor is always in one of three states: normal processing, exception processing, or
halted. It is in the normal processing state when executing instructions, fetching instructions
and operands, and storing instruction results.
Exception processing is the transition from program processing to system, interrupt, and
exception handling. Exception processing includes fetching the exception vector, stacking
operations, and refilling the instruction pipe after an exception. The processor enters excep-
tion processing when an exceptional internal condition arises such as tracing an instruction,
an instruction results in a trap, or executing specific instructions. External conditions, such
as interrupts and access errors, also cause exceptions. Exception processing ends when
the first instruction of the exception handler begins to execute.
The processor halts when it receives an access error or generates an address error while in
the exception processing state. For example, if during exception processing of one access
error another access error occurs, the processor is unable to complete the transition to nor-
mal processing and cannot save the internal state of the machine. The processor assumes
that the system is not operational and halts. Only an external reset can restart a halted pro-
cessor. Note that when the processor executes a STOP instruction, it is in a special type of
normal processing state, one without bus cycles. The processor stops, but it does not halt.
Thi d
t
t d
ith F
M k
4 0 4