Table of Contents
viii
MC68307 USER’S MANUAL
MOTOROLA
2.4.1
Reset (RESET) ........................................................................................... 2-9
2.4.2
Power-On Reset (RSTIN) ......................................................................... 2-10
2.4.3
Halt (HALT)............................................................................................... 2-10
2.4.4
Bus Request (BR/PA5) ............................................................................. 2-10
2.4.5
Bus Grant (BG/PA6) ................................................................................. 2-10
2.4.6
Bus Grant Acknowledge (BGACK /PA7) .................................................. 2-10
2.5
Clock Signals .............................................................................................. 2-10
2.5.1
Crystal Oscillator (EXTAL, XTAL)............................................................. 2-10
2.5.2
Clock Output (CLKOUT) ........................................................................... 2-11
2.6
Test Signals ................................................................................................ 2-11
2.6.1
Test Clock (TCK) ...................................................................................... 2-11
2.6.2
Test Mode Select (TMS)........................................................................... 2-11
2.6.3
Test Data In (TDI) ..................................................................................... 2-11
2.6.4
Test Data Out (TDO) ................................................................................ 2-11
2.7
M-Bus I/O Signals....................................................................................... 2-11
2.7.1
Serial Clock (SCL/PB0) ............................................................................ 2-11
2.7.2
Serial Data (SDA/PB1) ............................................................................. 2-12
2.8
UART I/O Signals ....................................................................................... 2-12
2.8.1
Transmit Data (TxD/PB2) ......................................................................... 2-12
2.8.2
Receive Data (RxD/PB3) .......................................................................... 2-12
2.8.3
Request-To-Send (RTS/PB4) ................................................................... 2-12
2.8.4
Clear-To-Send (CTS/PB5)........................................................................ 2-12
2.9
Timer I/O Signals ........................................................................................ 2-12
2.9.1
Timer 1 Input (TIN1/PB6) ......................................................................... 2-12
2.9.2
Timer 2 Input (TIN2/PB7) ......................................................................... 2-13
2.9.3
Timer 1 Output (TOUT1/PA3)................................................................... 2-13
2.9.4
Timer 2 Output (TOUT2/PA4)................................................................... 2-13
2.10
Interrupt Request Inputs ............................................................................. 2-13
2.10.1
Interrupt Inputs (INT1–INT8/PB8–PB15) .................................................. 2-13
2.10.2
Non-Maskable Interrupt Input (IRQ7) ....................................................... 2-13
2.11
Use of Pullup Resistors .............................................................................. 2-13
2.12
Signal Index ................................................................................................ 2-14
Section 3
Bus Operation
3.1
Data Transfer Operations ............................................................................. 3-1
3.1.1
16-Bit M68000 Bus Operation .................................................................... 3-1
3.1.2
16-Bit M68000 Bus Read Cycle ................................................................. 3-2
3.1.3
16-Bit M68000 Bus Write Cycle.................................................................. 3-5
3.1.4
Read-Modify-Write Cycle............................................................................ 3-8
3.1.5
CPU Space Cycle ..................................................................................... 3-11
3.1.6
8-Bit M68000 Dynamically-Sized Bus ...................................................... 3-11
3.1.7
8051-Bus Operation ................................................................................. 3-13
3.2
Bus Arbitration ............................................................................................ 3-15
3.2.1
Requesting the Bus .................................................................................. 3-17