Revision 1.1
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G
Core Logic Module
(Continued)
489h
48Ah
48Bh
R/W
R/W
R/W
DMA Channel 6 High Page Register
DMA Channel 7 High Page Register
DMA Channel 5 High Page Register
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Page 270
Page 270
Programmable Interval Timer Registers (Table 5-45)
040h
W
R
W
R
W
R
PIT Timer 0 Counter
PIT Timer 0 Status
PIT Timer 1 Counter (Refresh)
PIT Timer 1 Status (Refresh)
PIT Timer 2 Counter (Speaker)
PIT Timer 2 Status (Speaker)
PIT Mode Control Word Register
Read Status Command
Counter Latch Command
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Page 271
Page 271
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Page 272
041h
042h
043h
R/W
Programmable Interrupt Controller Registers (Table 5-46)
020h / 0A0h
021h / 0A1h
021h / 0A1h
021h / 0A1h
021h / 0A1h
020h / 0A0h
020h / 0A0h
020h / 0A0h
WO
WO
WO
WO
R/W
WO
WO
RO
Master / Slave PCI ICW1
Master / Slave PIC ICW2
Master / Slave PIC ICW3
Master / Slave PIC ICW4
Master / Slave PIC OCW1
Master / Slave PIC OCW2
Master / Slave PIC OCW3
Master / Slave PIC Interrupt Request and Service Registers for OCW3 Commands
Page 273
Page 273
Page 273
Page 273
Page 273
Page 274
Page 274
Page 274
Keyboard Controller Registers (Table 5-47)
060h
061h
062h
064h
066h
092h
R/W
R/W
R/W
R/W
R/W
R/W
External Keyboard Controller Data Register
Port B Control Register
External Keyboard Controller Mailbox Register
External Keyboard Controller Command Register
External Keyboard Controller Mailbox Register
Port A Control Register
Page 276
Page 276
Page 276
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Page 276
Real-Time Clock Registers (Table 5-48)
070h
071h
072h
073h
WO
R/W
WO
R/W
RTC Address Register
RTC Data Register
RTC Extended Address Register
RTC Extended Data Register
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Page 277
Page 277
Page 277
Miscellaneous Registers (Table 5-49)
0F0h, 0F1h
1F0-1F7h/
3F6h-3F7h
4D0h
4D1h
WO
R/W
Coprocessor Error Register
Primary IDE Registers
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Page 277
R/W
R/W
Interrupt Edge/Level Select Register 1
Interrupt Edge/Level Select Register 2
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Page 278
Table 5-28. ISA Legacy I/O Register Summary (Continued)
I/O Port
Type
Name
Reference