Revision 1.1
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G
Signal Definitions
(Continued)
E26
GPIO32
I/O
(PU
22.5
)
IN
PCI
,
O
PCI
V
IO
PMR[14] = 0
LAD0
I/O
(PU
22.5
)
IN
PCI
,
O
PCI
PMR[14] = 1
F1
2
MD12
I/O
IN
T
,
TS
2/5
V
IO
---
F2
2
MD13
I/O
IN
T
,
TS
2/5
V
IO
---
F3
2
MD46
I/O
IN
T
,
TS
2/5
V
IO
---
F4
2
MD47
I/O
IN
T
,
TS
2/5
V
IO
---
F23
AD13
I/O
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
A13
O
O
PCI
F24
AD14
I/O
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
A14
O
O
PCI
F25
AD2
I/O
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
A2
O
O
PCI
F26
AD1
I/O
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
A1
O
O
PCI
G1
2
MD11
I/O
IN
T
,
TS
2/5
V
IO
---
G2
2
MD45
I/O
IN
T
,
TS
2/5
V
IO
---
G3
2
MD44
I/O
IN
T
,
TS
2/5
V
IO
---
G4
V
IO
PWR
---
---
---
G23
V
IO
PWR
---
---
---
G24
C/BE1#
I/O
(PU
22.5
)
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
D9
I/O
(PU
22.5
)
IN
PCI
,
O
PCI
G25
AD4
I/O
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
A4
O
O
PCI
G26
AD3
I/O
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
A3
O
O
PCI
H1
2
MD10
I/O
IN
T
,
TS
2/5
V
IO
---
H2
2
MD43
I/O
IN
T
,
TS
2/5
V
IO
---
H3
2
MD42
I/O
IN
T
,
TS
2/5
V
IO
---
H4
V
SS
GND
---
---
---
H23
V
SS
GND
---
---
---
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer
1
Type
Power
Rail
Configuration
H24
PAR
I/O
(PU
22.5
)
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
D12
I/O
(PU
22.5
)
IN
PCI
,
O
PCI
H25
AD6
I/O
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
A6
O
O
PCI
H26
AD5
I/O
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
A5
O
O
PCI
J1
2
MD9
I/O
IN
T
,
TS
2/5
V
IO
---
J2
2
MD41
I/O
IN
T
,
TS
2/5
V
IO
---
J3
2
MD40
I/O
IN
T
,
TS
2/5
V
IO
---
J4
V
IO
PWR
---
---
---
J23
V
IO
PWR
---
---
---
J24
PERR#
I/O
(PU
22.5
)
IN
PCI
,
O
PCI
V
IO
---
J25
AD10
I/O
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
A10
O
O
PCI
J26
AD9
I/O
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
A9
O
O
PCI
K1
MA2
O
O
2/5
V
IO
---
K2
2
MD8
I/O
IN
T
,
TS
2/5
V
IO
---
K3
MA5
O
O
2/5
V
IO
---
K4
V
SS
GND
---
---
---
K23
V
SS
GND
---
---
---
K24
AD17
I/O
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
A17
O
O
PCI
K25
AD11
I/O
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
A11
O
O
PCI
K26
AD12
I/O
IN
PCI
,
O
PCI
V
IO
Cycle Multiplexed
A12
O
O
PCI
L1
MA0
O
O
2/5
V
IO
---
L2
MA1
O
O
2/5
V
IO
---
L3
MA4
O
O
2/5
V
IO
---
L4
V
CORE
PWR
---
---
---
L11
V
SS
GND
---
---
---
L12
V
CORE
PWR
---
---
---
L13
V
SS
GND
---
---
---
L14
V
SS
GND
---
---
---
L15
V
CORE
PWR
---
---
---
L16
V
SS
GND
---
---
---
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer
1
Type
Power
Rail
Configuration
Table 2-2. Ball Assignment - Sorted by Ball Number (Continued)