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G
Core Logic Module
(Continued)
0
Lower ROM Size.
Selects lower ROM addressing size in which ROMCS# goes active.
0: Lower ROM access are 000F0000h-000FFFFFh (64 KB) (Default).
1: Lower ROM accesses are 000E0000h-000FFFFFh (128 KB).
ROMCS# goes active for the above ranges whether strapped for ISA or LPC. (Refer to F0BAR1+I/O Offset 10h[15] for fur-
ther strapping/programming details.)
The selected range can then be either positively or subtractively decoded through F0 Index 5Bh[5].
Index 53h
Alternate CPU Support Register (R/W)
Reset Value: 00h
7
6
5
Reserved.
Must be set to 0.
Reserved.
Must be set to 0.
Bidirectional SMI Enable.
0: Disable.
1: Enable.
This bit must be set to 0.
Reserved.
Must be set to 0.
IRQ13 Function Selection.
Selects function of the internal IRQ13/FERR# signal.
0: FERR#.
1: IRQ13.
This bit must be set to 1.
Generate SMI on A20M# Toggle.
0: Disable.
1: Enable.
This bit must be set to 1.
SMI status is reported at F1BAR0+I/O Offset 00h/02h[7].
4:2
1
0
Index 54h-59h
Reserved
Reset Value: 00h
Index 5Ah
Indicates PCI positive or negative decoding for various I/O ports on the ISA bus.
Note:
Positive decoding by the Core Logic module speeds up I/O cycle time. The I/O ports mentioned in the bit descriptions below, do
not exist in the Core Logic module. It is assumed that if positive decode is enabled for a port, the port exists on the ISA bus.
Decode Control Register 1 (R/W)
Reset Value: 01h
7
Secondary Floppy Positive Decode.
Selects PCI positive or subtractive decoding for accesses to I/O ports 372h-375h
and 377h.
0: Subtractive.
1: Positive.
Primary Floppy Positive Decode.
Selects PCI positive or subtractive decoding for accesses to I/O ports 3F2h-3F5h and
3F7h.
0: Subtractive.
1: Positive.
COM4 Positive Decode.
Selects PCI positive or subtractive decoding for accesses to I/O ports 2E8h-2EFh.
0: Subtractive.
1: Positive.
COM3 Positive Decode.
Selects PCI positive or subtractive decoding for accesses to I/O ports 3E8h-3EFh.
0: Subtractive.
1: Positive.
COM2 Positive Decode.
Selects PCI positive or subtractive decoding for accesses to I/O ports 2F8h-2FFh.
0: Subtractive.
1: Positive.
COM1 Positive Decode.
Selects PCI positive or subtractive decoding for accesses to I/O ports 3F8h-3FFh.
0: Subtractive.
1: Positive.
6
5
4
3
2
Table 5-29. F0: PCI Header and Bridge Configuration Registers for GPIO and LPC Support (Continued)
Bit
Description