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G
SuperI/O Module
(Continued)
4.2
The SIO module comprises a collection of generic func-
tional blocks. Each functional block is described in detail
later in this chapter. The beginning of this chapter
describes the SIO structure and provides all device specific
information, including special implementation of generic
blocks, system interface, and device configuration.
MODULE ARCHITECTURE
The SIO module is based on six logical devices, the host
interface, and a central configuration register set, all built
around a central, internal 8-bit bus.
The host interface serves as a bridge between the external
ISA interface and the internal bus. It supports 8-bit I/O
read, 8-bit I/O write and 8-bit DMA transactions, as defined
in
Personal Computer Bus Standard P996
.
The central configuration
register set supports ACPI com-
pliant PnP configuration. The configuration registers are
structured as a subset of the Plug and Play Standard Reg-
isters, defined in Appendix A of the
Plug and Play ISA
Specification
Version 1.0a by Intel and Microsoft. All sys-
tem resources assigned to the functional blocks (I/O
address space, DMA channels and IRQ lines) are config-
ured in, and managed by, the central configuration register
set. In addition, some function-specific parameters are con-
figurable through this unit and distributed to the functional
blocks through special control signals.
The source of the device internal clocks is the 48 MHz
clock signal or through the 32.768 KHz crystal with an
internal frequency multiplier. The RTC operates on a
32.768 KHz clock.
Figure 4-2. Detailed SIO Block Diagram
IRRX1
IRTX
P
and Control
Registers
System
Wakeup
DACK[0-3]#
DRQ[0-3]
IRQ[1-12,14-15]
IOCHRDY
ZWS#
I
Host
Interface
C
SIN
SOUT
RTS#
DTR#/BOUT
CTS#
RI#
DCD#
DSR#
Serial
Port
R
V
B
V
S
Configuration
TC
Infrared
Real Time Clock (RTC)
C
C
M
X
X
D
IOWR#
IORD#
AEN
A
A
ACCESS.
bus 1
AB1C
AB1D
AB2C
AB2D
Internal
Internal
Signals
Internal Signals
Internal
Signal
ACCESS.
bus 2
Communication
Port