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參數(shù)資料
| 型號： | TE28F800C3TD70 |
| 廠商： | INTEL CORP |
| 元件分類： | PROM |
| 英文描述： | 512K X 16 FLASH 3V PROM, 70 ns, PDSO48 |
| 封裝： | 12 X 20 MM, TSOP-48 |
| 文件頁數(shù)： | 33/72頁 |
| 文件大?。?/td> | 1083K |
| 代理商： | TE28F800C3TD70 |
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Intel Advanced+ Boot Block Flash Memory (C3)
Datasheet
Intel Advanced+ Boot Block Flash Memory (C3)
May 2005
Order Number: 290645, Revision: 023
39
9.0
Device Operations
The Intel Advanced+ Boot Block Flash Memory (C3) device uses a CUI and automated
algorithms to simplify Program and Erase operations. The CUI allows for 100% CMOS-level
control inputs and fixed power supplies during erasure and programming.
The internal WSM completely automates Program and Erase operations while the CUI signals the
start of an operation and the Status Register reports device status. The CUI handles the WE#
interface to the data and address latches as well as system status requests during WSM operation.
9.1
Bus Operations
The Intel Advanced+ Boot Block Flash Memory (C3) device performs read, program, and erase
operations in-system through the local CPU or microcontroller. Four control pins (CE#, OE#,
WE#, and RP#) manage the data flow in and out of the flash device. Table 20 on page 39
summarizes these bus operations.
9.1.1
Read
When performing a read cycle, CE# and OE# must be asserted; WE# and RP# must be deasserted.
CE# is the device selection control; when active low, it enables the flash memory device. OE# is
the data output control; when low, data is output on DQ[15:0]. See Figure 9, “Read Operation
9.1.2
Write
A write cycle occurs when both CE# and WE# are low; RP# and OE# are high. Commands are
issued to the Command User Interface (CUI). The CUI does not occupy an addressable memory
location. Address and data are latched on the rising edge of the WE# or CE# pulse, whichever
occurs first. See Figure 10, “Write Operations Waveform” on page 32.
9.1.3
Output Disable
With OE# at a logic-high level (VIH), the device outputs are disabled. DQ[15:0] are placed in a
high-impedance state.
Table 20.
Bus Operations
Mode
RP#
CE#
OE#
WE#
DQ[15:0]
Read
VIH
VIL
VIH
DOUT
Write
VIH
VIL
VIH
VIL
DIN
Output Disable
VIH
VIL
VIH
High-Z
Standby
VIH
XX
High-Z
Reset
VIL
XX
X
High-Z
Note:
X = Don’t Care (VIL or VIH)
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