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參數(shù)資料
| 型號(hào)： | TE28F800C3TD70 |
| 廠商： | INTEL CORP |
| 元件分類(lèi)： | PROM |
| 英文描述： | 512K X 16 FLASH 3V PROM, 70 ns, PDSO48 |
| 封裝： | 12 X 20 MM, TSOP-48 |
| 文件頁(yè)數(shù)： | 52/72頁(yè) |
| 文件大小： | 1083K |
| 代理商： | TE28F800C3TD70 |
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Intel Advanced+ Boot Block Flash Memory (C3)
May 2005
Intel Advanced+ Boot Block Flash Memory (C3)
Datasheet
56
Order Number: 290645, Revision: 023
Appendix B Flow Charts
Figure 17.
Word Program Flowchart
Program
Suspend
Loop
Start
Write 0x40,
Word Address
Write Data,
Word Address
Read Status
Register
SR[7] =
Full Status
Check
(if desired)
Program
Complete
Suspend?
1
0
No
Yes
WORD PROGRAM PROCEDURE
Repeat for subsequent Word Program operations.
Full Status Register check can be done after each program, or
after a sequence of program operations.
Write 0xFF after the last operation to set to the Read Array
state.
Comments
Bus
Operation
Command
Data = 0x40
Addr = Location to program
Write
Program
Setup
Data = Data to program
Addr = Location to program
Write
Data
Status register data: Toggle CE# or
OE# to update Status Register
Read
None
Check SR[7]
1 = WSM Ready
0 = WSM Busy
Idle
None
(Setup)
(Confirm)
FULL STATUS CHECK PROCEDURE
Read Status
Register
Program
Successful
SR[3] =
SR[1] =
0
SR[4] =
0
1
V
PP Range
Error
Device
Protect Error
Program
Error
SR[3] MUST be cleared before the Write State Machine will
allow further program attempts.
If an error is detected, clear the Status Register before
continuing operations - only the Clear Staus Register
command clears the Status Register error bits.
Idle
Bus
Operation
None
Command
Check SR[3]:
1 = V
PP
Error
Check SR[4]:
1 = Data Program Error
Comments
Idle
None
Check SR[1]:
1 = Block locked; operation aborted
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