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參數(shù)資料
| 型號： | TE28F800C3TD70 |
| 廠商： | INTEL CORP |
| 元件分類： | PROM |
| 英文描述： | 512K X 16 FLASH 3V PROM, 70 ns, PDSO48 |
| 封裝： | 12 X 20 MM, TSOP-48 |
| 文件頁數(shù)： | 40/72頁 |
| 文件大?。?/td> | 1083K |
| 代理商： | TE28F800C3TD70 |
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Intel Advanced+ Boot Block Flash Memory (C3)
Datasheet
Intel Advanced+ Boot Block Flash Memory (C3)
May 2005
Order Number: 290645, Revision: 023
45
10.3.1
Suspending and Resuming Erase
Since an Erase operation requires on the order of seconds to complete, an Erase Suspend command
is provided to allow erase-sequence interruption to read data from—or program data to— another
block in memory. Once the erase sequence is started, issuing the Erase Suspend command to the
CUI suspends the erase sequence at a predetermined point in the erase algorithm. The Status
Register indicates if/when the Erase operation has been suspended. Erase-suspend latency is
specified by tWHRH2/tEHRH2.
A Read Array or Program command can now be issued to the CUI to read/program data from/to
blocks other than that which is suspended. This nested Program command can subsequently be
suspended to read yet another location. The only valid commands while Erase is suspended are
Read Status Register, Read Identifier, CFI Query, Program Setup, Program Resume, Erase
Resume, Lock Block, Unlock Block, and Lock-Down Block. During erase-suspend mode, the
device can be placed in a pseudo-standby mode by taking CE# to VIH, which reduces active current
consumption.
Erase Resume continues the erase sequence when CE# = VIL. Similar to the end of a standard
Erase operation, the Status Register must be read and cleared before the next instruction is issued.
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