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參數(shù)資料
| 型號： | TMPR28051 |
| 英文描述： | TMPR28051 STS-1/AU-3 (STM-0) Mapper Device Advisory for Version 5 of the Device |
| 中文描述： | TMPR28051 STS-1/AU-3（的STM - 0）映射為版本的設(shè)備5設(shè)備咨詢 |
| 文件頁數(shù)： | 58/90頁 |
| 文件大?。?/td> | 1090K |
| 代理商： | TMPR28051 |
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Data Sheet
August 1999
TMPR28051 STS-1/AU-3 (STM-0) Mapper
44
Lucent Technologies Inc.
Microprocessor Interface Description
(continued)
Register Architecture Description
(continued)
Table 15
.
Registers 0x00—0x16: Device-Level Control, Alarm, and Mask Bits
(continued)
Address
(Hex)
Bit #
Name
Function
Reset
Default
(Hex)
0x00
0x0D
—
—
The bits in register 0x0D are used to report path and sec-
tion overhead.
The G1-[5:8] are used to report the four least significant
bits of the G1 path overhead byte.
7
6
5
4
3
2
1
0
—
G1-5
G1-6
G1-7
G1-8
—
K2-6
K2-7
K2-8
—
Reserved.
The K2-[6:8] bits are used to report the three least signifi-
cant bits of the K2 section overhead byte.
0x0E
The bits in register 0x0E are used to set the number of con-
secutive, consistent values required by registers 0x0B and
0x0C before updating their values.
The C2#DET-[3:0] bits are used to set the number of con-
secutive and consistent values required before updating
C2-[7:0] bits in register 0x0C.
0x33
7
6
5
4
3
2
1
0
C2#DET-3
C2#DET-2
C2#DET-1
C2#DET-0
F2#DET-3
F2#DET-2
F2#DET-1
F2#DET-0
The F2#DET-[3:0] bits are used to set the number of con-
secutive and consistent values required before updating
F2-[7:0] bits in register 0x0B. Valid values for this register
range from 3 to 15. Any value less than 3 defaults to 2
inside the device.
The bits in register 0x0F are used to set the number of con-
secutive, consistent values required by register 0x0D
before updating their values.
The G1#DET-[3:0] bits are used to set the number of con-
secutive and consistent values required before updating
G1-[5:8] bits in register 0x0D.
0x0F
—
—
0x33
7
6
5
4
3
2
1
0
G1#DET-3
G1#DET-2
G1#DET-1
G1#DET-0
K2#DET-3
K2#DET-2
K2#DET-1
K2#DET-0
The K2#DET-[3:0] bits are used to set the number of con-
secutive and consistent values required before updating
K2-[6:8] bits in register 0x0D. Valid values for this register
range from 3 to 15. Any value less than 3 defaults to 2
inside the device.
The F2INS-[7:0] bits in register 0x10 are used to set the
values to be transmitted in the F2 byte.
0x10
7—0
F2INS-[7:0]
0x00
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