- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371187 > TMPR28051 TMPR28051 STS-1/AU-3 (STM-0) Mapper Device Advisory for Version 5 of the Device PDF資料下載
參數(shù)資料
| 型號： | TMPR28051 |
| 英文描述： | TMPR28051 STS-1/AU-3 (STM-0) Mapper Device Advisory for Version 5 of the Device |
| 中文描述： | TMPR28051 STS-1/AU-3（的STM - 0）映射為版本的設(shè)備5設(shè)備咨詢 |
| 文件頁數(shù)： | 71/90頁 |
| 文件大?。?/td> | 1090K |
| 代理商： | TMPR28051 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁當(dāng)前第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁
Data Sheet
August 1999
TMPR28051 STS-1/AU-3 (STM-0) Mapper
57
Lucent Technologies Inc.
Microprocessor Interface Description
(continued)
Register Architecture Description
(continued)
Detected BIP Errors (0xC0—0xFD)
Table 27. Registers 0xC0—0xFD: Detected BIP Errors
Note:
Bits in registers 0xC0—0xFF can have one of four configurations, depending upon the setting of register
0xBF. When register 0xBF is set for BIP_CNTS = 1, the bytes in registers 0xC0—0xFD are used to count the
number of BIP errors detected by the device.
* These registers are not contiguous, i.e., every other register in this group is shown (0xC6, 0xC8, 0xCA, . . . 0xFC) per the register map, page
29 and page 30.
These registers are not contiguous, i.e., every other register in this group is shown (0xC7, 0xC9, 0xCB, . . . 0xFD) per the register map, page
29 and page 30.
Table 28. Registers 0xFE, 0xFF: Received SONET/SDH Pointer Value
When register 0xBF is set for BIP_CNTS = 1, the bytes in registers 0xFE—0xFF are used to report the received
SONET/SDH pointer value.
Address
(Hex)
Bit #
Name
Function
Reset
Default
(Hex)
Value is
0.
0xC0
0xC1
0xC2
0xC3
0xC4
0xC5
0xC6—
0xFC*
7—0
7—0
7—0
7—0
7—0
7—0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
B1BIPCNT-[15:8]
B1BIPCNT-[7:0]
B2BIPCNT-[15:8]
B2BIPCNT-[7:0]
B3BIPCNT-[15:8]
B3BIPCNT-[7:0]
VT[1:28]PTR+3
VT[1:28]PTR+2
VT[1:28]PTR+1
VT[1:28]PTR+0
BIP2CNT11_[1:28]
BIP2CNT10_[1:28]
BIP2CNT9_[1:28]
BIP2CNT8_[1:28]
BIP2CNT7_[1:28]
BIP2CNT6_[1:28]
BIP2CNT5_[1:28]
BIP2CNT4_[1:28]
BIP2CNT3_[1:28]
BIP2CNT2_[1:28]
BIP2CNT1_[1:28]
BIP2CNT0_[1:28]
Registers 0xC0—0xC5. The first six registers in the
block, 0xC0—0xC5, are the BIP errors detected by B1,
B2, and B3.
Registers 0xC6—0xFD. The remaining registers in the
block indicate the errors seen by the BIP-2 error detec-
tors in the individual VT1.5 slots.
Since the BIP-2 errors only require 12 bits, the VT pointer
increment counts are also presented in these registers.
The values in all of these counters are latched by the
LATCH_CNT bit in register 0x00. (See the STS-1/AU-3
Terminate section, page 16 and page 17.)
Value is
0.
0xC7—
0xFD
Address
(Hex)
Bit #
Name
Function
Reset
Default
(Hex)
0x00
0xFE
7—0
SPTR+[7:0]
Register 0xFE. The SPTR+[7:0] bits report the SONET
pointer increment value.
Register 0xFF. The SPTR–[7:0] bits report the SONET
pointer decrement value.
0xFF
7—0
SPTR–[7:0]
0x00
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMUX03155 | TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer |
| TMXF28155 | TMXF28155 Super Mapper 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 |
| TMXF84622 | TMXF84622 155 Mbits/s/622 Mbits/s Interface SONET/SDH x84/x63 Ultramapper |
| TN2-L-H-3V | SLIM POLARIZED RELAY |
| TN2-L-H-48V | SLIM POLARIZED RELAY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMPR28051-3-SL5 | 制造商:AGERE 制造商全稱:AGERE 功能描述:TMPR28051 STS-1/AU-3 (STM-0) Mapper Device Advisory for Version 5 of the Device |
| TMPR28051-SL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ATM/SONET MAPPER|QFP|208PIN|PLASTIC |
| TMPR3904F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROPROCESSOR|32-BIT|CMOS|QFP|208PIN|PLASTIC |
| TMPR3907F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROPROCESSOR|32-BIT|CMOS|QFP|208PIN|PLASTIC |
| TMPR3911 | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:32-Bit TX System RISC TX39 Family |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。