參數(shù)資料
型號(hào): TMPR28051
英文描述: TMPR28051 STS-1/AU-3 (STM-0) Mapper Device Advisory for Version 5 of the Device
中文描述: TMPR28051 STS-1/AU-3(的STM - 0)映射為版本的設(shè)備5設(shè)備咨詢
文件頁數(shù): 60/90頁
文件大?。?/td> 1090K
代理商: TMPR28051
Data Sheet
August 1999
TMPR28051 STS-1/AU-3 (STM-0) Mapper
46
Lucent Technologies Inc.
Microprocessor Interface Description
(continued)
Register Architecture Description
(continued)
Table 15
.
Registers 0x00—0x16: Device-Level Control, Alarm, and Mask Bits
(continued)
Address
(Hex)
Bit #
Name
Function
Reset
Default
(Hex)
0x00
0x13
7—4
3
2
1
0
Reserved.
The S1INS-[3:0] bits in register 0x13 are used to set the
four least significant bits of the S1 path overhead byte.
S1INS-3
S1INS-2
S1INS-1
S1INS-0
0x14
The bits in register 0x14 are for the S1 path overhead byte.
The S1#DET-[3:0] bits are used to set the number of con-
secutive, consistent values required by the receive S1 byte
before updating the value. Valid values for these registers
range from 3 to 15. Any value less than 3 defaults to 2
inside the device.
The S1-[3:0] bits are used to report the four least significant
bits of the S1 path overhead byte.
0x30
7
6
5
4
S1#DET-3
S1#DET-2
S1#DET-1
S1#DET-0
3
2
1
0
S1-3
S1-2
S1-1
S1-0
0x15
7—0
DEVID-[7:0]
DEVID-[7:0] bits in register 0x15 are used to report the
device ID.
The DEVVER-[3:0] bits in register 0x16 are used to report
the device version. Anytime there are silicon changes that
modify the operation of this device, this register will be
incremented by 1.
0x51
0x16
Notes:
The reset default value is the device version.
Bits 7—4 are reserved.
7—4
3
2
1
0
DEVVER-3
DEVVER-2
DEVVER-1
DEVVER-0
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