參數(shù)資料
型號(hào): TMPR28051
英文描述: TMPR28051 STS-1/AU-3 (STM-0) Mapper Device Advisory for Version 5 of the Device
中文描述: TMPR28051 STS-1/AU-3(的STM - 0)映射為版本的設(shè)備5設(shè)備咨詢
文件頁數(shù): 82/90頁
文件大?。?/td> 1090K
代理商: TMPR28051
Data Sheet
August 1999
TMPR28051 STS-1/AU-3 (STM-0) Mapper
68
Lucent Technologies Inc.
Timing Characteristics
(continued)
Operational Timing
(continued)
Table 39 lists the setup time (t
SU
) and hold time (t
H
) specifications for the receive input and JTAG signals. The digi-
tal system interface timing is shown in Figure 11.
*
These clock edges are programmable through the microprocessor interface.
Notes:
represents a low-to-high transition.
represents a high-to-low transition.
5-5342(F)r.5
Figure 11. Interface Data Timing
Table 39. Input Timing Specifications
Input Name
Reference CLK
*
Setup Time
(t
SU
)
Hold Time
(t
H
)
Unit
Min
Max
Min
Max
Receive Signals
5
50
15
15
5
JTAG Signal
50
TSTS1SYNC
RDATA[1:28]
RSTS1DATA[7:0]
RSTS1PAR
RSTS1SERIAL
TSTS1CLKIN
RCLK[1:28]
↑↓
RSTS1CLK
↑↓
RSTS1CLK
↑↓
RSTS1CLK
↑↓
2
ns
ns
ns
ns
ns
40
2
2
2
TDI
TCK
50
ns
CLOCK IN
DATA IN
t
SU
t
H
CLOCK OUT
DATA OUT
t
PD
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