參數(shù)資料
型號: 21440
廠商: Intel Corp.
英文描述: Multiport 10/100Mb/s Ethernet Controller(多端口10/100Mb/s 以太網(wǎng)控制器)
中文描述: 多端口10/100Mb/s以太網(wǎng)控制器(多端口支持10/100Mbps以太網(wǎng)控制器)
文件頁數(shù): 23/92頁
文件大小: 1352K
代理商: 21440
21440 Multiport 10/100Mb/s Ethernet Controller
3-3
Register Descriptions
3.2.2
Base Registers
The following sections describe the individual base registers.
3.2.2.1
Chip Interrupt Summary Register
This register handles the interrupt status of all the ports. A set bit indicates that the corresponding
port has generated an interrupt, and several bits located in its Interrupt Status Register have been
set. A bit will reset when the corresponding interrupts have been cleared. The interrupt summary
register is valid only in port 0.
Bit Name
Bit Number
Bit Description
INT7
7
Port 7 interrupt
INT6
6
Port 6 interrupt
INT5
5
Port 5 interrupt
INT4
4
Port 4 interrupt
INT3
3
Port 3 interrupt
INT2
2
Port 2 interrupt
INT1
1
Port 1 interrupt
INT0
0
Port 0 interrupt
Access Rules
Register access
R
Value after reset
00H
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