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參數(shù)資料
| 型號： | 21440 |
| 廠商： | Intel Corp. |
| 英文描述： | Multiport 10/100Mb/s Ethernet Controller(多端口10/100Mb/s 以太網(wǎng)控制器) |
| 中文描述： | 多端口10/100Mb/s以太網(wǎng)控制器（多端口支持10/100Mbps以太網(wǎng)控制器） |
| 文件頁數(shù)： | 89/92頁 |
| 文件大小： | 1352K |
| 代理商： | 21440 |
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21440 Multiport 10/100Mb/s Ethernet Controller
A-1
Joint Test Action Group – Test Logic
A
This appendix describes the joint test action group (JTAG) test logic and the associated registers.
A.1
General Description
JTAG test logic supports testing, observation, and modification of circuit activity during normal
operation of the components. The 21440 supports the IEEE Standard 1149.1 Test Access Port and
Boundary Scan Architecture. The 21440 JTAG test logic allows boundary scan to be used to test
both the device and the board it is installed in. The JTAG test logic consists of the following four
signals to serially interface within the 21440:
tck
–
JTAG clock
tdi
–
Test data and instructions in
tdo
–
Test data and instructions out
tms
–
Test mode select
Note:
If JTAG test logic is not used, the tck pin should be connected to
“
0
”
, and both the tms and tdi pins
should be connected to
“
1
”
. The tdo signal should remain unconnected.
If JTAG logic is used, a 1149.1 ring is created by connecting one device
’
s tdo pin to another
device
’
s tdi pin and so on, to create a serial chain of devices. In this application, the 21440 receives
the same tck and tms signals as the other devices. The entire 1149.1 ring is connected to either a
motherboard test connector for test purposes or to a resident 1149.1 controller.
A.1.1
Test Access Port Controller
The test access port (TAP) controller interprets IEEE P1149.1 protocols received on the tms pin.
The TAP controller generates clocks and control signals to control the operation of the test logic.
The TAP controller consists of a state machine and a control dispatch logic. The 21440 fully
implements the TAP state machine as described in the IEEE P1149.1 Standard.
A.2
Registers
In JTAG test logic, three registers are implemented in the 21440:
Instruction register
Bypass register
Boundary-scan register
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