參數(shù)資料
型號(hào): 21440
廠商: Intel Corp.
英文描述: Multiport 10/100Mb/s Ethernet Controller(多端口10/100Mb/s 以太網(wǎng)控制器)
中文描述: 多端口10/100Mb/s以太網(wǎng)控制器(多端口支持10/100Mbps以太網(wǎng)控制器)
文件頁(yè)數(shù): 30/92頁(yè)
文件大?。?/td> 1352K
代理商: 21440
Register Descriptions
3-10
21440 Multiport 10/100Mb/s Ethernet Controller
3.2.2.9
Serial Command Register
The serial command register handles the control of the serial interface.
Bit Name
Bit Number
Bit Description
7:6
RESERVED
MDM
5
MII data mode.
When set, the mdio signal is in the output mode. When reset, the mdio signal
is in the input mode.
This bit is effective only in port
0
.
MDIO
4
MII data IO.
During write access to the MII management, the value written to this bit is
driven onto the mdio signal. During read access, the mdio signal value is
latched into this bit.
This bit is effective only in port
0
.
MDC
3
MII management clock.
The value written to this bit is driven onto the mdc signal. Each new written
value must remain stable for at least 200 ns.
This bit is effective only in port
0
.
BKP
2
Backpressure mode.
When set, a transmission is generated upon reception of each packet to force
a collision while the port is in the half-duplex mode.
FCT
1
Flow-control packet trigger.
When set, this bit initiates a flow-control packet transmission to the remote
node, as defined in the 802.3 IEEE Standard, while the port is in the
full-duplex mode. This bit can be used only if the XON disable bit on transmit
parameters register (TX_PARAM) is set.
0
RESERVED
Access Rules
Register access
R/W
Value after reset
00H
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