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參數(shù)資料
| 型號： | 21440 |
| 廠商： | Intel Corp. |
| 英文描述： | Multiport 10/100Mb/s Ethernet Controller(多端口10/100Mb/s 以太網(wǎng)控制器) |
| 中文描述： | 多端口10/100Mb/s以太網(wǎng)控制器（多端口支持10/100Mbps以太網(wǎng)控制器） |
| 文件頁數(shù)： | 9/92頁 |
| 文件大小： | 1352K |
| 代理商： | 21440 |
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21440 Multiport 10/100Mb/s Ethernet Controller
1-1
Introduction
1
The 21440 Multiport 10/100 Mb/s Ethernet Controller (also called the 21440) provides eight
10/100 Mb/s intelligent, high-performance MAC ports. It includes network management support
and is optimized for switch applications.
1.1
General Description
The 21440 Multiport Ethernet Controller includes eight independent 10/100 Mb/s Ethernet MACs and
interfaces directly to MII standard PHYs or SYM 100BASE-TX physical devices. The 21440 handles
SNMP and RMON management counter sets, accessible through a generic CPU interface, which is
also used for mode programming. Each MAC includes two 256-byte independent FIFOs for packet
transmit and receive. All the packets are transferred onto a high-performance, common FIFO interface,
or FIFO bus. The 21440 is fully compatible with IEEE standards, including Fast Ethernet and
flow-control support. It is implemented in a low-power 3.3 V CMOS device within a 352-BGA
package.
1.2
Integration Features
The 21440:
Offers eight Ethernet 10/100 Mb/s MAC ports
Includes onchip scrambler, descrambler, and PCS functions for 100BASE-X connections
Handles SNMP and RMON counters
1.3
FIFO Bus Features
The 21440:
Supports a 4 Gb/s high bus bandwidth
Offers a variable bus speed of 25 to 66 MHz operational, and from 16 MHz for testing
Interfaces a 64-bit bus with a 32-bit optional mode
Provides transmit- and receive-independent 256-byte FIFOs for each of the eight ports
Offers a generic slave FIFO interface
Supports little or big endian byte ordering
Supports transmit and receive byte alignment
Supports receive packet fragmentation on byte boundaries (replay feature)
Provides programmable transmit and receive bus thresholds
Appends packet status to received packet
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