![](http://datasheet.mmic.net.cn/300000/KU386_datasheet_16201615/KU386_2.png)
Intel386
TM
SX MICROPROCESSOR
Intel386
TM
SX MicroProcessor
CONTENTS
PAGE
1.0 PIN DESCRIPTION
àààààààààààààààààààà 3
2.0 BASE ARCHITECTURE
àààààààààààààààà 6
2.1 Register Set
àààààààààààààààààààààààààààà 6
2.2 Instruction Set
ààààààààààààààààààààààààà 10
2.3 Memory Organization
àààààààààààààààààà 11
2.4 Addressing Modes
àààààààààààààààààààà 12
2.5 Data Types
àààààààààààààààààààààààààààà 15
2.6 I/O Space
ààààààààààààààààààààààààààààà 15
2.7 Interrupts and Exceptions
àààààààààààààà 17
2.8 Reset and Initialization
ààààààààààààààààà 20
2.9 Testability
ààààààààààààààààààààààààààààà 20
2.10 Debugging Support
ààààààààààààààààààà 21
3.0 REAL MODE ARCHITECTURE
ààààààà 22
3.1 Memory Addressing
ààààààààààààààààààà 22
3.2 Reserved Locations
ààààààààààààààààààà 23
3.3 Interrupts
àààààààààààààààààààààààààààààà 23
3.4 Shutdown and Halt
àààààààààààààààààààà 23
3.5 LOCK Operations
ààààààààààààààààààààà 23
4.0 PROTECTED MODE
ARCHITECTURE
ààààààààààààààààààààààà 24
4.1 Addressing Mechanism
àààààààààààààààà 24
4.2 Segmentation
ààààààààààààààààààààààààà 24
4.3 Protection
ààààààààààààààààààààààààààààà 29
4.4 Paging
àààààààààààààààààààààààààààààààà 33
4.5 Virtual 8086 Environment
àààààààààààààà 36
CONTENTS
PAGE
5.0 FUNCTIONAL DATA
ààààààààààààààààà 39
5.1 Signal Description Overview
ààààààààààà 39
5.2 Bus Transfer Mechanism
àààààààààààààà 45
5.3 Memory and I/O Spaces
àààààààààààààà 45
5.4 Bus Functional Description
àààààààààààà 45
5.5 Self-test Signature
ààààààààààààààààààààà 63
5.6 Component and Revision
Identifiers
ààààààààààààààààààààààààààààààà 63
5.7 Coprocessor Interfacing
ààààààààààààààà 63
6.0 PACKAGE THERMAL
SPECIFICATIONS
àààààààààààààààààààààà 64
7.0 ELECTRICAL SPECIFICATIONS
ààààà 64
7.1 Power and Grounding
ààààààààààààààààà 64
7.2 Maximum Ratings
ààààààààààààààààààààà 65
7.3 D.C. Specifications
àààààààààààààààààààà 66
7.4 A.C. Specifications
àààààààààààààààààààà 68
7.5 Designing for ICE
TM
-Intel386 SX
Emulator
àààààààààààààààààààààààààààààààà 78
8.0 DIFFERENCES BETWEEN THE
Intel386
TM
SX CPU and the
Intel386
TM
DX CPU
àààààààààààààààààààà 79
9.0 INSTRUCTION SET
ààààààààààààààààààà 80
9.1 Intel386
TM
SX CPU Instruction
Encoding and Clock Count Summary
àààà 80
9.2 Instruction Encoding
ààààààààààààààààààà 95
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