
Intel386
TM
SX MICROPROCESSOR
Functional operating range: V
CC
e
5V
g
10%; T
CASE
e
0
§
C to 100
§
C
Table 7.5. Intel386
TM
SX Microprocessor A.C. CharacteristicsD33 MHz and 25 MHz
(Continued)
Symbol
Parameter
33 MHz
Intel386 SX
25 MHz
Intel386 SX
Unit
Figure
Notes
Min
Max
Min
Max
t
23
HOLD Setup Time
9
9
ns
7.4
t
24
HOLD Hold Time
2
3
ns
7.4
t
25
RESET Setup Time
5
8
ns
7.7
t
26
RESET Hold Time
2
3
ns
7.7
t
27
NMI, INTR Setup Time
5
6
ns
7.4
(Note 2)
t
28
NMI, INTR Hold Time
5
6
ns
7.4
(Note 2)
t
29
PEREQ, ERROR
Y
, BUSY
Y
,
FLT
Y
Setup Time
5
6
ns
7.4
(Note 2)
t
30
PEREQ, ERROR
Y
, BUSY
Y
,
FLT
Y
Hold Time
4
5
ns
7.4
(Note 2)
NOTES:
1. Float condition occurs when maximum output current becomes less than I
LO
in magnitude. Float delay is not 100%
tested.
2. These inputs are allowed to be asynchronous to CLK2. The setup and hold specifications are given for testing purposes
to assure recognition within a specific CLK2 period.
3. These are not tested. They are guaranteed by design characterization.
4. Tested with CL set at 50 pF. See Figures 7 and 8 for load capacitance derating curve.
5. Minimum time not 100% tested.
Table 7.6. Low Power (LP) Intel386
TM
SX Microprocessor A.C. CharacteristicsD33 MHz and 25 MHz
Symbol
Parameter
33 MHz
Intel386 SX
25 MHz
Intel386 SX
Unit
Figure
Notes
Min
Max
Min
Max
Operating Frequency
2
33
2
25
MHz
Half CLK2 Frequency
t
1
CLK2 Period
15
250
20
250
ns
7.3
t
2a
CLK2 HIGH Time
6.25
7
ns
7.3
at 2V
(3)
t
2b
CLK2 HIGH Time
4.0
4
ns
7.3
at (V
CC
b
0.8)V
(3)
; Note 3
t
3a
CLK2 LOW Time
6.25
7
ns
7.3
at 2V
(3)
t
3b
CLK2 LOW Time
4.5
5
ns
7.3
at 0.8V
(3)
t
4
CLK2 Fall Time
4
7
ns
7.3
(V
CC
b
0.8)V to 0.8V
(3)
0.8V to (V
CC
b
0.8)V
(3)
C
L
e
50 pF
(4)
t
5
CLK2 Rise Time
4
7
ns
7.3
t
6
A
23
–A
1
Valid Delay
4
15
4
17
ns
7.5
t
7
A
23
–A
1
Float Delay
BHE
Y
, BLE
Y
, LOCK
Y
Valid Delay
4
20
4
30
ns
7.6
(Note 1)
t
8
4
15
4
17
ns
7.5
C
L
e
50 pF
(4)
t
9
BHE
Y
, BLE
Y
, LOCK
Y
Float Delay
4
20
4
30
ns
7.6
(Note 1)
70