參數(shù)資料
型號: PPXY8300A6T1
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: Pressure Sensor
英文描述: DIFFERENTIAL, PEIZORESISTIVE PRESSURE SENSOR, RECTANGULAR, SURFACE MOUNT
封裝: SOIC-20
文件頁數(shù): 100/162頁
文件大?。?/td> 4316K
代理商: PPXY8300A6T1
MPXY8300 Series
Sensors
42
Freescale Semiconductor
Figure 5-12 System Power Management Status and Control 2 Register (SPMSC2)
5.9.11
System Power Management Status and Control 3 Register (SPMSC3)
This register contains one read-only status flag, PDF, which indicates that the MCU has exited the full power down mode (stop1
mode). PDF is unaffected by reset and is cleared by writing a logic 1 to the PPDACK bit in SPMSC2.
7
6
5
4
3
2
1
0
R
0
PDF
PPDF
0
PDC(1)
NOTES:
1. This bit can be written only one time after reset. Additional writes are ignored.
PPDC1
W
PPDACK
Power-on reset:
0
Any other reset:
0
U
0
= Unimplemented or Reserved
U = Unaffected by reset
Table 5-15 SPMSC2 Register Field Descriptions
Field
Description
4
PDF
Power Down Flag — This read-only status bit indicates the MCU has recovered from stop1 mode.
0
MCU has not recovered from stop1 mode
1
MCU recovered from stop1 mode
3
PPDF
Partial Power Down Flag — The PPDF bit indicates that the MCU has exited the stop2 mode.
0
Not stop2 mode recovery
1
Stop2 mode recovery
2
PPDACK
Partial Power Down Acknowledge — Writing a logic 1 to PPDACK clears the PPDF and the PDF bits
1
PDC
Power Down Control — The PDC bit controls entry into the power down (stop2 and stop1) modes
0
Power down modes are disabled
1
Power down modes are enabled
0
PPDC
Partial Power Down Control — The PPDC bit controls which power down mode is selected.
0
Stop1 full power down mode enabled if PDC set
1
Stop2 partial power down mode enabled if PDC set
7
6
5
4
3
2
1
0
R
LVWF
0
LVDV
LVWV
0
W
LVWACK
Power-on reset:
0((1))
NOTES:
1. LVWF will be set in the case when VSupply transitions below the trip point or after reset and VSupply is already below VLVW.
0
LVD reset:
0(1)
0
U
0
Any other reset:
0(1)
0
U
0
= Unimplemented or Reserved
U = Unaffected by reset
Figure 5-13 System RTI Status and Control Register (SRTISC)
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