參數(shù)資料
型號(hào)： PPXY8300A6T1
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： Pressure Sensor
英文描述： DIFFERENTIAL, PEIZORESISTIVE PRESSURE SENSOR, RECTANGULAR, SURFACE MOUNT
封裝： SOIC-20
文件頁數(shù)： 111/162頁
文件大?。?/td> 4316K
代理商： PPXY8300A6T1
MPXY8300 Series
Sensors
52
Freescale Semiconductor
8.2.1
Accumulator (A)
The A accumulator is a general-purpose 8-bit register. One operand input to the arithmetic logic unit (ALU) is connected to the
accumulator and the ALU results are often stored into the A accumulator after arithmetic and logical operations. The accumulator
can be loaded from memory using various addressing modes to specify the address where the loaded data comes from, or the
contents of A can be stored to memory using various addressing modes to specify the address where data from A will be stored.
Reset has no effect on the contents of the A accumulator.
8.2.2
Index Register (H:X)
This 16-bit register is actually two separate 8-bit registers (H and X), which often work together as a 16-bit address pointer where
H holds the upper byte of an address and X holds the lower byte of the address. All indexed addressing mode instructions use
the full 16-bit value in H:X as an index reference pointer; however, for compatibility with the earlier M68HC05 Family, some
instructions operate only on the low-order 8-bit half (X).
Many instructions treat X as a second general-purpose 8-bit register that can be used to hold 8-bit data values. X can be cleared,
incremented, decremented, complemented, negated, shifted, or rotated. Transfer instructions allow data to be transferred from
A or transferred to A where arithmetic and logical operations can then be performed.
For compatibility with the earlier M68HC05 Family, H is forced to 0x00 during reset. Reset has no effect on the contents of X.
8.2.3
Stack Pointer (SP)
This 16-bit address pointer register points at the next available location on the automatic last-in-first-out (LIFO) stack. The stack
may be located anywhere in the 64-Kbyte address space that has RAM and can be any size up to the amount of available RAM.
The stack is used to automatically save the return address for subroutine calls, the return address and CPU registers during
interrupts, and for local variables. The AIS (add immediate to stack pointer) instruction adds an 8-bit signed immediate value to
SP. This is most often used to allocate or deallocate space for local variables on the stack.
SP is forced to 0x00FF at reset for compatibility with the earlier M68HC05 Family. HCS08 programs normally change the value
in SP to the address of the last location (highest address) in on-chip RAM during reset initialization to free up direct page RAM
(from the end of the on-chip registers to 0x00FF).
The RSP (reset stack pointer) instruction was included for compatibility with the M68HC05 Family and is seldom used in new
HCS08 programs because it only affects the low-order half of the stack pointer.
8.2.4
Program Counter (PC)
The program counter is a 16-bit register that contains the address of the next instruction or operand to be fetched.
During normal program execution, the program counter automatically increments to the next sequential memory location every
time an instruction or operand is fetched. Jump, branch, interrupt, and return operations load the program counter with an
address other than that of the next sequential location. This is called a change-of-flow.
During reset, the program counter is loaded with the reset vector that is located at 0xFFFE and 0xFFFF. The vector stored there
is the address of the first instruction that will be executed after exiting the reset state.
8.2.5
Condition Code Register (CCR)
The 8-bit condition code register contains the interrupt mask (I) and five flags that indicate the results of the instruction just
executed. Bits 6 and 5 are set permanently to 1. The following paragraphs describe the functions of the condition code bits in
general terms. For a more detailed explanation of how each instruction sets the CCR bits, refer to the HCS08 Family Reference
Manual, volume 1, Freescale Semiconductor document order number HCS08RMv1.
Figure 8-2 Condition Code Register
CONDITION CODE REGISTER
CARRY
ZERO
NEGATIVE
INTERRUPT MASK
HALF-CARRY (FROM BIT 3)
TWO’S COMPLEMENT OVERFLOW
70
CCR
C
V1 1 H I N Z
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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